• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.464-466
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• 1996

IGBT devices have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirements and high current density capability. When designing circuit and systems that utilize IGSTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.650-656
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• 2016

Voltage controlled oscillator (VCO) is widely used circuit component in high-performance microprocessors and modern communication systems as a frequency source. In present work, VCO designs using the different combination of NAND gates with three transistors and CMOS inverter are reported. Three, five and seven stages ring VCO circuits are designed. Coarse and fine tuning have been done using two different supply sources. The frequency with coarse tuning varies from 3.31 GHz to 5.60 GHz in three stages, 1.77 GHz to 3.26 GHz in five stages and 1.27 GHz to 2.32 GHz in seven stages VCO respectively. Moreover, for fine tuning frequency varies from 3.70 GHz to 3.94 GHz in three stages, 2.04 GHz to 2.18 GHz in five stages and 1.43 GHz to 1.58 GHz in seven stages VCO respectively. Results of power consumption and phase noise for the VCO circuits are also been reported. Results of proposed VCO circuits have been compared with previously reported circuits and present circuit approach show significant improvement.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.585-586
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• 2008

In this paper, a novel beta-multiplier reference current source circuit for the 800mV power-supply voltage is presented. In order to cope with the narrow input common-mode range of the OpAmp in the reference circuit, shunt resistive voltage divider branches were deployed. High gain OpAmp was designed to compensate intrinsic low output resistance of the MOS transistors. The proposed reference circuit was designed in a standard 0.18um CMOS process with nominal Vth of 420mV and -450mV for nMOS and pMOS transistor respectively. The total power consumption including OpAmp is less than 50uW.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.164-171
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• 1996

We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

• Journal of Sensor Science and Technology
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• v.21 no.5
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• pp.379-384
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• 2012

This paper presents the power source of wireless sensor node (WSN) using supercapacitors and a solar cell. Supercapacitors have high lifetime cycling compared to that of batteries. Supercapacitors are connected in series to achieve higher voltage and a voltage balancing circuit is required to ensure that no individual cell goes overvoltage. We employ an active balancing circuit that draws minimal current by using transistors. A diode is connected in series with each supercapacitor. A new balancing circuit that equalize the cells-voltage reduces energy consumption of supercapacitors. Voltage of operating WSN is applied 2.2-3.3V by DC/DC converter and supercapacitor voltage 2.2-5.1V. Maximum operating time of wireless sensor node is about 16 hours in full charging.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.26-28
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• 1996

A high power SiGe HBT has been fabricated using APCVD(Atmospheric Pressure Chemical Vapor Deposition) and its perfermanoe has been analysed. The composition of Ge in the SiGe base was graded from 0% at the emitter-base junction to 20% at the base-collector junction. As a base electrode, titanium disilicide(TiSi$_2$) was used to reduce the extrinsic base resistance. The SiGe HBT with an emitter area of 2$\times$8${\mu}{\textrm}{m}$$^2$typically has a cutoff frequency(f$_{T}$) of 7.0GHz and a maximun oscillation frequency(f$_{max}$) of 16.1GHz with a pad de-embedding. The packaged high power SiGe HBT with an emitter area of 2xBx80${\mu}{\textrm}{m}$$^2$typically shows a cutoff frequency of 4.7GHz and a maximun oscillation frequency of 7.1GHz at Ic of 115mA.A.A.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.513-514
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• 2006

As power supply managements become more important than before, supplying a stable system voltage is becoming more and more critical. In this study we propose to use the advantage of weak inversion region of MOS transistors. Analog system, which uses weak inversion region, could work in low voltage environment and reduce power consumption. The proposed buck-converter in weak inversion region of MOS transistor has been verified by silicon chip.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.833-836
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• 2007

A low power and small area source driver using LTPS TFTs is proposed for mobile applications. This source driver adopts level shifter with holding latch function and new R-to-R type digital-to-analog converter (DAC). The power consumption and layout area of the proposed source driver are reduced by 23% and 25% for 16M colors and qVGA AM-OLED panel, respectively.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.28-35
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• 1997

A new approach concurrent transistor sizing and buffer insertion for low power optimization is proposed in this paper. The method considers the tradeoff between upsizing transistors and inserting buffers and chooses the solution with the lowest possible power and area cost. It operates by analyzing the feasible region of the cost-delay curves of the unbuffered and buffered circuits. As such the feasible region of circuits optimized by our method is extended to encompass the envelop of cost-delay curves which represent the union of the feasible regions of all buffered ad unbuffered versions of the circuit. The method is efficient and tunable in that optimality can be traded for compute time and as a result it can in theory near optimal results.

• Transactions on Electrical and Electronic Materials
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• v.1 no.4
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• pp.16-19
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• 2000

Power transistors to be used in Power Integrated Circuits(PIC) are required to have low on resistance, fast switching speed, and high breakdown voltage. The lateral IGBTs(LIGBTs)are promising power devices for high voltage PIC applications, because of its superior device characteristics. In this paper, dual cathode LIGBT(DCIGBT) for high voltage is presented. We have verified the effectiveness of high blocking voltage in the new device by using two dimensional devices simulator. We have analyzed the forward blocking characteristics , the latch up performance and turn off characteristics of the proposed structure. Specially, we have focused forward blocking of LIGBT. The forward blocking voltage of conventional LIGBT and the proposed LIGBT are 120V and 165V, respectively. . The forward blocking characteristics of the proposed LIGBT is better than that of the conventional LIGBT. This forward blocking comparison exhibits a 1.5 times improvement in the proposed LIGBT.