• 전력전자학회논문지
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• 제8권2호
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• pp.192-198
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• 2003

본 논문에서는 의료 진단용 40kw(125kV, 80mA)급 X-선 전원 장치에 대하여 연구하였다. 의료 X-선용 고전압 발생 장치의 구성과 X-선 관전압과 관전류 그리고 피폭량 제어에 대하여 기존 제어 방식과 비교 설명하였고 제어기 설계시 고려할 사항에 대하여 언급하였다. 또한, 본 시스템의 핵심이라 할 수 있는 고주파 고전압 변압기의 등가회로를 통한 기생 성분에 대하여 기술하였으며 본 연구에서 제작된 의료 X-선용 HFG 시스템의 출력특성의 우수성을 X-전관 부하 변동에 따른 X-선 관전류와 관전압 파형을 통하여 입증하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권2호
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• pp.186-192
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• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

• 한국산업정보학회논문지
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• 제20권1호
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• pp.1-7
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• 2015

In this paper, a 12-bit high resolution, power and area efficiency hybrid digital pulse width modulator (DPWM) with process and temperature (PT) calibration has been proposed for digital controlled DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential tapped delay line ring-mux digital-to-time converter (DTC) schema and a 6-bit counter-comparator DTC schema, resulting in a power and area saving solution. Furthermore, since the 6-bit differential delay line ring oscillator serves as the clock to the high 6-bit counter-comparator DTC, a high frequency clock is eliminated, and the power is significantly saved. In order to have a simple delay cell and flexible delay time controllability, a voltage controlled inverter is adopted to build the deferential delay cell, which allows fine-tuning of the delay time. The PT calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs and a lookup table. The monitor circuits sense the PT (Process and Temperature) variations, and the flash ADC converts the data into a digital code. The complete circuits design has been verified under different corners of CMOS 0.18um process technology node.

• Journal of Power Electronics
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• 제18권5호
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• pp.1489-1500
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• 2018

Partial shading analysis of large-scale photovoltaic (PV) arrays has recently become a theoretically and numerically challenging issue, and it is necessary for PV system designers. The main contributions of this study are the following: 1) A PSIM-based macro-model was employed because it is remarkably fast, has high precision, and has no convergence issues. 2) Three types of equivalent macro-models were developed for the transformation of a small PV sub-array with uniform irradiance to a new macro-model. 3) On the basis of the proposed new macro-model, a tearing method was established, which can divide a large-scale PV array into several small sub-arrays to significantly improve the efficiency improvement of a simulation. 4) Three platforms, namely, PSIM, PSpice, and MATLAB, were applied to evaluate the proposed tearing method. The proposed models and methods were validated, and the value of this research was highlighted using an actual large-scale PV array with 2420 PV modules. Numerical simulation demonstrated that the tearing method can remarkably improve the simulation efficiency by approximately thousands of times, and the method obtained a precision of nearly 6.5%. It can provide a useful tool to design the optimal configuration of a PV array with a given shading pattern as much as possible.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제5B권3호
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• pp.277-282
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• 2005

This paper describes a step-down AC voltage regulator using an AC chopper and auxiliary transformer, which is a series connected to the main input. The detail design of the AC regulator, logic and PWM pattern of the AC chopper is described and the three-phase AC regulator using two single­phase AC choppers with a three transformer configuration is proposed for three-phase application. The proposed three-phase system has the advantages of lower system cost due to reduced switch number and gate driver circuit as well as advantages of decreased size and weight because it uses a series compensated scheme. The proposed AC regulator has many benefits such as fast voltage control, high efficiency and simple control logic. Experimental results indicate that it can be used as a step-down AC voltage regulator for power saving purposes very efficiently.

• Journal of Korean Vacuum Science & Technology
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• 제3권1호
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• pp.66-73
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• 1999

In this paper, the design of one-chip FED system integrated with driving circuits in reported on the basis of MOSFET controlled FEA (MCFEA). To integrate a MOSFET with a FEA efficiently, a new fabrication process is proposed. It is confirmed that the MOSFET with threshold voltage of about 2volts controls the FEA emission current up to 20 ${\mu}$A by applying driving voltage of 15 volts, which is enough current level to utilize the MCFEA as a pixel for FED. The drain breakdown voltage of the MOSFET is measured to be 70 volts, which is also high enough for 60 volt operation of FED. The circuits for row and column driver are designed stressing on saving area, reducing malfunction probability and consuming low power to maximize the merit of on-chip driving circuits. Dynamic logic concept and bootstrap capacitors are used to meet these requirements. By integrating the driving circuit with FEA, the number of external I/O lines can be less than 20, irrespectively of the number of pixels.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 전력전자학술대회 논문집
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• pp.159-162
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• 2001

This paper is proposed an efficiency optimization operation algorithm for synchronous reluctance motor (SynRM) using current phase angle control technique. The SynRM has to controlled with the optimal current phase angles with load and operation speed variation, to obtain high efficiency over the wide speed ranges. An efficiency optimization condition in SynRM which minimizes the copper and iron losses is derived based on the equivalent circuit model of the machine. The objective of the efficiency optimization control algorithm compensating the optimum current angle, is to seek a combination of d and q-axis current components which provides minimum losses at a certain operating point in steady state. The usefulness of the proposed efficiency optimization control is verified through vector-controlled inverter system with the SynRM.

• 한국조명전기설비학회지:조명전기설비
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• 제2권4호
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• pp.75-81
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• 1988

TRIAC 위상제어 방식은 교류전류의 제어에 편리한 방법으로 많이 응용되고 있다. 유도전동기는 부하변화에 따라 역율과 효율이 변화하며 특히 무부하와 경부하에서는 큰 전력손실을 유발한다. 본 연구에서는 TRIAC 위상제어 방식을 이용하여 유도전동기의 기계적부하에 따른 최적의 전압을 공급함으로써 효율과 역율을 개선시켜 전력손실을 줄이는 것을 기본동작원리로 하며 종래의 구조의 복잡성과 경제성 및 실용성을 크게 개선 하는데 설계의 주된 목표를 두었다. 제안된 절전회로는 실험결과 부하의 변화가 빈번한 곳에 운용되는 소형유도전동기에서 상당한 절전효과가 나타났다.

• Journal of Power Electronics
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• 제4권3호
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• pp.138-151
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• 2004

In this paper, a constant frequency phase shifting PWM-controlled voltage source full bridge-type series load resonant high-frequency inverter using the $4^{th}$ generation IGBT power modules is presented for innovative consumer electromagnetic induction heating applications, such as a hot water producer, steamer and super heated steamer. The bridge arm side link passive capacitive snubbers in parallel with each power semiconductor device and AC load side linked active edge inductive snubber-assisted series load resonant tank soft switching inverter with a constant frequency phase shifted PWM control scheme is evaluated and discussed on the basis of the simulation and experimental results. It is proved from a practical point of view that the series load resonant and edge resonant hybrid high-frequency inverter topology, what is called, DE class type, including the variable-power variable-frequency regulation function can expand zero voltage soft switching commutation area even under low output power setting ranges, which is more suitable and acceptable for newly developed induction heated dual pack fluid heaters. Furthermore, even the lower output power regulation mode of this high-frequency load resonant tank inverter circuit is verified so that this inverter can achieve ZVS with the aid of the single auxiliary inductor snubber.

• 전기학회논문지
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• 제63권11호
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• pp.1538-1544
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• 2014

In recent years, The electronic and energy industries demand low power consumption and high efficiency, so under their demands, the white goods industries which are represented for refrigerator and air conditioner system be implemented energy-saving power suppling structure with inverter control system. As inverter control system is different from step control type, when switching system is optimizing temperature control during short period, the inrush plus current can be flown in the circuit. In despite of these characteristics, there is no fuse which can be applied to this type until now. For this reason, we suggest the method of manufacturing protector in the high efficient inverter control system using the alumina-based ceramic radiated heat characteristics and metal films laminated plating. And through the evaluating electrical characteristics, we make a possible to utilize the method when designing overall fuses.