• The Korean Journal of Ceramics
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• v.2 no.2
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• pp.95-101
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• 1996

Variations of the leakage current behaviors and interface potential barrier $({\Phi}_B)$ of rf-sputter deposited (Ba, Sr)$TiO_3$ (BST) thin films with thicknesses ranging from 20 nm to 150nm are investigated as a function of the thickness and bias voltages. The top and bottom electrodes are dc-sputter-deposited Pt films. ${\Phi}_B$ critically depends on the BST film deposition temperature, postannealing atmosphere and time after the annealing. The postannealing under $N_2$ atmosphere results in a high interface potential barrier height and low leakage current. Maintaining the BST capacitor in air for a long time reduces the ${\Phi}_B$ from about 2.4 eV to 1.6 eV due to the oxidation. ${\Phi}_B$ is not so dependent on the film thickness in this experimental range. The leakage conduction mechanism is very dependent on the BST film thickness; the 20 nm thick film shows tunneling current, 30 and 40 nm thick films show Shottky emission current.

• Journal of Power System Engineering
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• v.17 no.5
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• pp.44-51
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• 2013

This paper proposes and analyzes recycling of optical phonons emitted by nonradiative decay, which is a major thermal management concern for high-power light emitting diodes (LED), by introducing an integrated, heterogeneous barrier cooling layer. The cooling is proportional to the number of phonons absorbed per electron overcoming the potential barrier, while the multi-phonon absorption rate is inversely proportional to this number. We address the theoretical treatment of photon-electron-phonon interaction/transport kinetics for optimal number of phonons (i.e., barrier height). We consider a GaN/InGaN LED with a metal/AlGaAs/GaAs/metal potential barrier and discuss the energy conversion rates. We find that significant amount of heat can be recycled by the barrier transition cooling layer.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.1
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• pp.159-163
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• 1996

Simulated electron tunneling time through a potential barrier is compared with theoretical phase time. For a GaAs/Al/sub 0.3/Ga/sub 0.7/As/GaAs potential barrier with 300 meV height and 3 nm or 5 nm width, simulations are performed with various average electron energies and momentum deviations. The simulation results become closer to the theoretical phase time as the average electron energy decreases and as the momentum deviation decreases. It is also shown that a barrier, which is due to the peak spectrum shift in the momentum space after tunneling. (author). refs., figs.

• Journal of Sensor Science and Technology
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• v.7 no.3
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• pp.188-196
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• 1998

The sensing and electrical characteristics of $WO_{3}$-based n-type semiconductor gas sensors are investigated. In normal air condition, $TiO_{2}$(4 wt. %)-doped $WO_{3}$-based sensor fabricated without any binder shows the grain boundary ( GB ) potential barrier height of 0.26 V. Sensors fabricated with alumina, PVA and silica sol binders show 0.17, 0.22 and 0.26 V of GB potential barrier height, respectively. In the ambience of 120 ppm $NO_{x}$ concentration, the GB potential barrier height of the sensor fablicated without binder is increased to 0.59 V. The sensors were fabricated with alumina, PVA, silica sol binders show 0.43, 0.66 and 0.52 V of potential barrier, respectively. Thus the variation of the potential barrier at GB is largest in the sensor fabricated with the PVA binder. This is found to be the main reason why the sensor fabricated with the PVA binder shows the best sensitivity. It is also found that the decrease of sensitivity at a temperature higher than the optimum operation temperature is due to the temperature dependence of the sensor resistance in normal air condition rather than the desorption of the adsorbed $NO_{x}$ gas particles. In the ambience of 250 ppm CO concentration, the GB potential barrier heights of the sensors fabricated without binder and with PVA binder are about 0.2 V showing negligible change compared to the case of normal air ambience. This fact indicates that these sensors are good candidates for the selective detection of $NO_{x}$ gas in the mixture of CO and $NO_{x}$ gases.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.7
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• pp.58-68
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• 1995

Polysilicon capacitors with pyrogenic oxide and TEOX oxide as insulators were fabricated to develop capacitors which can be applied to analog CMOS IC, and the characteristics of the capacitors were compared with each other. The morphology of bottom polysilicon in pyrogenic oxide capacitor is degraded due to the generaged protuberances of the polysilicon grain during oxidataion. The polysilican capacitor with pyrogenic oxide of 57 nm thickness showed that the effective potential barrier height of 0.45 eV is much less than that of MOS capacitor (3.2 eV)when the top electrode is biased with a positive volgate. The morphology of the polysilicon capacitor with TEOS oxide, however, was not degraded during oxide deposition by LPCVD. The polysilicon capacitor with TEOS oxide of 54 nm thickness showed the effective potential barrier height of 1.28 eV when the top electrode is biased with a negative voltage. Therefore, it is concluded that the polysilicon capacitor with TEOS oxide is more applicable to analog CMOS IC than the pyrogenic oxide polysilicon capacitor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.3
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• pp.579-584
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• 2012

In this paper, drain induced barrier lowering(DIBL) has been analyzed as one of short channel effects occurred in double gate(DG) MOSFET. The DIBL is very important short channel effects as phenomenon that barrier height becomes lower since drain voltage influences on potential barrier of source in short channel. The analytical potential distribution of Poisson equation, validated in previous papers, has been used to analyze DIBL. Since Gaussian function been used as carrier distribution for solving Poisson's equation to obtain analytical solution of potential distribution, we expect our results using this model agree with experimental results. The change of DIBL has been investigated for device parameters such as channel thickness, oxide thickness and channel doping concentration.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.888-891
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• 2011

In this paper, drain induced barrier lowering(DIBL) has been analyzed as one of short channel effects occurred in double gate(DG) MOSFET. The DIBL is very important short channel effects as phenomenon that barrier height becomes lower since drain voltage influences on potential barrier of source in short channel. The analytical potential distribution of Poisson equation, validated in previous papers, has been used to analyze DIBL. Since Gaussian function been used as carrier distribution for solving Poisson's equation to obtain analytical solution of potential distribution, we expect our results using this model agree with experimental results. The change of DIBL has been investigated for device parameters such as channel thickness, oxide thickness and channel doping intensity.

• The Korean Journal of Ceramics
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• v.4 no.1
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• pp.37-42
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• 1998

The barrier heights and carrier densities of ZnO varistors with various compositions were estimated using C-V, J-V and $\rho$-T relations. The barrier heights obtained from C-V and J-V plots were 0.73~5.98 eV and 0.25~2.70 eV, respectively. The carrier densities estimated from C-V plots were ~$10^{18}cm^{-3}$. Acceptable values of the barrier heights and the carrier densities were obtained from $\rho$-1/T curves and the capacitances at zero bias; 0.6~0.8 eV for the barrier heights and ~$10^{17}cm^{-3}$ for carrier densities. Addition of cobalt increased the barrier height and the carrier density, while chromium slightly lowered both of them.

• Journal of the Korean Ceramic Society
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• v.34 no.12
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• pp.1275-1281
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• 1997

ZnO varistors containing 5.0 at% Co3O4 and Pr6O11, ranging from 0.1 to 1.0 at%, were sintered at 130$0^{\circ}C$ and 135$0^{\circ}C$. The I-V characteristics and nonlinear coefficients of the specimens were investigated with respect to Pr addition and sintering temperature. In general the specimens sintered at 130$0^{\circ}C$ showed better varistor characteristic than those fired at 135$0^{\circ}C$, which seemed to be related with the liquid phase formation during sintering. The barrier heights obtained from C-V relations, 0.29-1.36 eV, were different from those acquired using resistivity-temperature plots measured at low voltage per grain boundary. Therefore the estimation of potential barrier heights using C-V relations is better suited for the specimens prepared in this study. The carrier densities obtained using C-V relations were ~1018 cm-3.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.7 no.3
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• pp.487-493
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• 1997

Ti/sic(4H) Schottky barrier diodes were fabricated. The donor concentration and the built-in potential obtained by capacitance-voltage(C-V) measurement was about $2.0{\times}10^{15}{\textrm}{cm}^{-3}$ and 0.65 V, respectively. The ideality factor of 1.07 was obtained from the slope of current-voltage(I-V) characteristics at low current density. The breakdown field under the reverse bias voltage was about $1.7{\times}10^3V/{\textrm}{cm}$ and was very high. The barrier height of Ti for SiC(4H) was 0.91 V, which was determined by the analysis of the saturation current-temperature and the C-V characteristics.