• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.1
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• pp.25-32
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• 2007

We investigated the silicide reaction stability between 10 nm-Col-xNix alloy films and silicon substrates with the existence of 4 nm-thick natural oxide layers. We thermally evaporated 10 nm-Col-xNix alloy films by varying $x=0.1{\sim}0.9$ on naturally oxidized single crystal and 70 nm-thick polycrystalline silicon substrates. The films structures were annealed by rapid thermal annealing (RTA) from $600^{\circ}C$ to $1100^{\circ}C$ for 40 seconds with the purpose of silicidation. After the removal of residual metallic residue with sulfuric acid, the sheet resistance, microstructure, composition, and surface roughness were investigated using a four-point probe, a field emission scanning electron microscope, a field ion bean4 an X-ray diffractometer, and an Auger electron depth profiling spectroscope, respectively, to confirm the silicide reaction. The residual stress of silicon substrate was also analyzed using a micro-Raman spectrometer We report that the silicide reaction does not occur if natural oxides are present. Metallic oxide residues may be present on a polysilicon substrate at high silicidation temperatures. Huge residual stress is possible on a single crystal silicon substrate at high temperature, and these may result in micro-pinholes. Our results imply that the natural oxide layer removal process is of importance to ensure the successful completion of the silicide process with CoNi alloy films.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1239-1241
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• 1995

The different hydrogen passivation effects on low-temperature processed and high-temperature processed poly-Si thin film transistors have been investigated. The hydrogen passivation on low-temperature processed poly-Si TFT results in the increase of the field-effect mobility and the decrease or the threshold voltage, while the hydrogenation increases the field-effect mobility and decreases the leakage current in high-temperature processed poly-Si TFT. The effective trap state densities of low-temperature processed poly-Si TFT before and after 5 hours of hydrogenation are estimated at about $4.0{\times}10^{12}/cm^2$ and $1.5{\times}10^{12}/cm^2$, while those of high-temperature processed poly-Si TFT are about $1.5{\times}10^{12}/cm^2$ and $1.2{\times}10^{12}/cm^2$, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.40-40
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• 2009

The electrical characteristic of the conventional self-aligned polycrystalline silicon (poly-Si) TFTs are known to present several undesired effects such as large leakage current, kink effect and hot-carrier effects. In this paper, LTPS TFTs with different GOLDD length were fabricated and investigated the effect of the GOLDD. GOLDD length of 1, 1.5 and $2{\mu}m$ were used, while the thickness of the gate dielectrics($SiN_x/SiO_2$) was fixed at 65nm(40nm/25nm). The electrical characteristics show that the kink effect is reduced at the LTPS TFTs, and degradation from the hot-carrier effect was also decreased by increasing GOLDD length.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.962-965
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• 2004

In this work, thin films of amorphous silicon (a-Si) were formed on plastic substrates by sputtering deposition and crystallized using excimer laser irradiation. As the entire process is conducted at room temperature, and the laser irradiation-induced heating is confined to the thin film, the plastic substrate is not subjected to thermal stresses. The microstructure resulting from the laser irradiation was dependent on the laser irradiation energy density and the composition of the underlying buffer layers. It was found that a layer of AlN deposited as a buffer between the plastic and the a-Si film increased the endurance of the a-Si film under laser irradiation, and resulted in polycrystalline Si grains up to 100nm in diameter.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.153-156
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• 2004

A newly developed flexible active-matrix (AM-) electrophoretic display (EPD) is reported. The AM-EPD features: (1) low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology, (2) fully integrated scan- and data-drivers, (3) flexibility and light-weight realized by transferring the whole circuits onto a plastic substrate using $SUFTLA^{TM}$ (Surface Free Technology by Laser Annealing/Ablation) process. A large storage capacitor is formed in each pixel so that driving electric field can be kept sufficiently strong during a writing period Two-phase driving scheme, a reset-phase which erases a previous image and a writing-phase for writing a new image, was chosen to cope with EPD's high driving voltage. The flexible AM-EPD has been successfully operated with a driving voltage of 8.5 V.

• Journal of the Korean Ceramic Society
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• v.31 no.8
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• pp.927-933
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• 1994

Alumina composite membranes were prepared by chemical vapor deposition (CVD) using aluminum-tri-isopropoxide as a precursor. Porous alumina supports were used in deposition, which were in disk shape with mean pore diameter of 0.1 ${\mu}{\textrm}{m}$ and prepared by slip-coasting process. film deposition morphology on porous support was simulated through depositing alumina film on polycrystalline silicon pattern, and its step coverage observed by SEM showed one deviated from uniform step coverage. N2 permeability through composite membranes and the pressure dependence decreased as the deposition time increased. Initially, the N2 permeability of the top layer was tend to decrease rapidly, and then the degree of decrease in N2 permeability was tend to diminish with deposition time. The N2 permeability increased with heat treatment temperature and the crack was generated in top layer at 100$0^{\circ}C$.

• Journal of the Korean Vacuum Society
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• v.7 no.s1
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• pp.156-158
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• 1998

This paper describes the preparation of boron-doped polycrystalline diamond thin film whose electrical resitivity is lower than $10^{-1}\Omega$cm. The 1$\times$1$\textrm{mm}^2$ microelectrodes, its conducting line with 0.2mm wide and 0.5$\times$0.5$\textrm{mm}^2$ pads was patterned by reactive ion beam etching. A glucose microsensor based on diamond film microelectrode and pyramidal containment produced on silicon by anisotropic etching was developed. Its advantages are high sensitivity and high stability.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1414-1415
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• 2011

높은 게이트와 드레인 바이어스 스트레스 조건에서 신뢰성을 높이기 위해 비대칭 스페이싱 다중채널 구조 (ASS) 를 이용한 다결정 실리콘 박막 트래지스터 (poly-Si TFTs) 를 제안하였다. 이것은 어떠한 추가공정 없이 제작할 수 있고 채널 가운데 부분의 넓은 공간을 이용하여 소자안의 유도된 열을 방출할 수 있기 때문에 기존의 트랜지스터에 비해 47%의 문턱전압감소와 3%의 이동도 변화 감소를 보인다. 이 실험결과는 제안된 소자구조가 기존의 소자에 비해 높은 게이트와 드레인 바이어스 조건에서 전기적 특성이 더 안정적이라는 것을 보여준다.

• Proceedings of the KSME Conference
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• 2007.05a
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• pp.1455-1458
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• 2007

In this research, a polycrystalline silicon (poly-Si) film layer for micro thermoelectric generator (TEG) was fabricated. The fabrication process of the thermoelectric poly-Si film layer is explained. The P-type and N-type poly-Si films were fabricated on a tetra ethoxy silane (TEOS) layer with a supporting Si wafer. Seebeck coefficient and electrical conductivity were measured, including the transport properties such as the hall coefficient, hall mobility and carrier concentration. The design parameters for a rapid thermal process (RTP) were decided based on the experimental results. The measured power factors of the P-type and N-type were $21.2\;{\mu}Wm^{-1}K^{-2}$ and $26.7\;{\mu}Wm^{-1}K^{-2}$, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1071-1074
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• 2007

6Mask CMOS process in low temperature polycrystalline silicon thin film transistors (poly-Si TFTs) has been developed and verified by manufacturing a 6Mask CMOS AMLCD panel. The novel 6Mask CMOS process is realized by eliminating the storage mask, gate mask and via open mask of conventional structure.