• Transactions on Electrical and Electronic Materials
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• 제1권2호
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• pp.7-11
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• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.

• Transactions on Electrical and Electronic Materials
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• 제10권3호
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• pp.85-88
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• 2009

This report demonstrates the immobilization of uniformly sized gold nanoparticles (AuNPs) on UV cross-linked poly(4-vinylpyridine) (P4VP) polymer thin films and the preparation of micropatterned structures of AuNPs on these films. The polymer thin films were prepared by a spin-coating of P4VP onto a cleaned silicon wafer surface. Upon UV irradiation, these films were then photo cross-linked. Gold nanoparticles were immobilized by immersing the polymer surface in a colloidal solution of gold nanoparticles stabilized by citric acid. The morphology of the films and the immobilization of AuNPs were studied by atomic force microscopy (AFM) and UV-visible spectroscopic techniques. The micropatterned gold structures that were produced on the polymer surface are delineated by combining with the photolithographic method. While untreated and simply spin coated films were physisorbed and unstable that could be easily removed by rinsing with a solvent, the cross-linked and AuNPs immobilized P4VP films were found to be highly stable even after repeated solvent extractions.

• 한국재료학회지
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• 제16권9호
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• pp.571-577
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• 2006

We fabricated thermal evaporated 10 nm-Ni/(poly)Si and 10 nm-Ni/1 nm-Ir/(poly)Si films to investigate the thermal stability of nickel monosilicide at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides for salicide process was formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester is used for sheet resistance. Scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An x-ray diffractometer and an auger depth profile scope were used for phase and composition analysis, respectively. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1200^{\circ}C$ and $800^{\circ}C$, respectively, while the conventional nickel monosilicide showed low resistance below $700^{\circ}C$. The grain boundary diffusion and agglomeration of silicides led to lower the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

• Journal of Information Display
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• 제11권1호
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• pp.12-16
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• 2010

The effect of the crystallization and activated annealing of Si films using an excimer laser and the new CW blue laser are described and compared with furnace annealing for application in advanced TFTs and for future applications. Pulsed excimer laser annealing (ELA) is currently being used extensively as a low-temperature poly-silicon (LTPS) process on glass substrates as its efficiency is high in the ultra-violet (UV) region for thin Si films with thickness of 40-60 nm. ELA enables extremely low resistivity relating to high crystallinity for both the n- and p-type Si films. On the other hand, CW blue laser diode annealing (BLDA) enables the smooth Si surface to have arbitral crystal grains from micro-grains to an anisotropic huge grain structure only by controlling its power density. Both annealing techniques are expected to be applied in the future advanced TFT systems.

• 한국진공학회지
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• 제2권2호
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• pp.246-254
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• 1993

DRAM 커패시터에서 축정용량을 증대시키기 위한 기초연구로서 2가지 방법을 시도하였다. 첫째로, 커패시터의 유효 표면적을 증대시키기 위해 HSG(hemispherical grain)와 rugged 형태의 표면형상을 갖는 폴리실리콘 전극을 저압 화학기상증착법을 이용하여 제잘하였다. 그 결과 기존의 평평한 폴리실리콘 전극에 비하여 유효면적이 증대된 폴리실리콘 전극이 형성되었다. 둘째로, 고유 전상수를 갖는 $Ta_2O_5$ 박막을 각각의 전극에 플라즈마 화학기상증착법으로 증착시키고 후열처리한 후 전기적 특성변화를 조사하였다. MIS(metal-insulator-semiconductor) 구조의 커패시터를 제작하여 전기적 특성을 측정한 결과, HSG와 rugged 형상의 표면을 갖는 전극에서 기존의 평평한 표면을 갖는 전극에 비하여 축전용량은 1.2~1.5배까지 증대하였으나, 주설전류는 표면적의 증가에 따라 함께 증가함을 보였다. TDDB 특성에서도 HSG와 rugged 형상의 표면을 갖는 전극들이 평평한 표면형상에 비하여 더 열화되었음을 보여주었다. 이상과 같은 결과는 $Ta_2O_5$ 유전박막을 이용한 차세대 DRAB 커패시터 연구에 기초자료로 이용될 수 있을 것으로 본다.

• 한국표면공학회지
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• 제50권5호
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• pp.352-359
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• 2017

The growth of nanocrystalline diamond films on a p-type poly silicon substrate was studied using microwave plasma chemical vapor deposition method. A 6 mm thick poly silicon plate was mirror polished and scratched in an ultrasonic bath containing slurries made of 30 cc ethanol and 1 gram of diamond powders having different sizes between 5 and 200 nm. Upon diamond deposition, the specimen scratched in a slurry with the smallest size of diamond powder exhibited the highest diamond particle density and, in turn, fastest diamond film growth rate. Diamond deposition was carried out applying different DC bias voltages (0, -50, -100, -150, -200 V) to the substrate. In the early stage of diamond deposition up to 2 h, the effect of voltage bias was not prominent probably because the diamond nucleation was retarded by ion bombardment onto the substrate. After 4 h of deposition, the film growth rate increased with the modest bias of -100 V and -150 V. With a bigger bias condition(-200 V), the growth rate decreased possibly due to the excessive ion bombardment on the substrate. The film grown under -150V bias exhibited the lowest contact angle and the highest surface roughness, which implied the most hydrophilic surface among the prepared samples. The film growth rate increased with the apparent activation energy of 21.04 kJ/mol as the deposition temperature increased in the range of $300{\sim}600^{\circ}C$.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2006년도 추계학술대회
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• pp.555-555
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• 2006

• 한국재료학회:학술대회논문집
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• 한국재료학회 1995년도 추계 학술발표 강연 및 논문개요집
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• pp.27-28
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• 1995

• 한국진공학회지
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• 제12권2호
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• pp.130-135
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• 2003

최근, poly-Si 박막은 저가의 박막소자응용을 위하여 사용되어 왔다. 그러나, 유리기판 위에서 일반적인 고상결정화(SPC) 방식으로 poly-Si 박막을 얻기는 불가능하다. 이러한 단점 때문에 유리와 같은 저가기판 위에 poly-Si을 결정화하는 연구가 최근 다양하게 진행되고 있다. 본 논문에서는 급속열처리(RTA)를 이용하여 유연한 기판인 몰리브덴 기판 위에서 a-Si:H를 성장시킨 후 고온결정화에 대한 연구를 진행하였다 고온결정화된 poly-Si 박막은 150$\mu\textrm{m}$ 두께의 몰리브덴 기판 위에 성장되었으며 결정화 온도는 고 진공하에서 $750^{\circ}C$~$1050^{\circ}C$ 사이에서 결정화된 시료에 대하여 결정화도, 결정화 면방향, 표면구조 및 전기적 특성이 조사되었다. 결정화온도 $1050^{\circ}C$에서 3분간 결정화된 시료의 결정화도는 92%를 나타내고 있었다. 결정화된 poly-Si 박막으로 제작된 TFT 소자로부터 전계효과 이동도 67 $\textrm{cm}^2$/Vs을 얻을 수 있었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2000년도 제18회 학술발표회 논문개요집
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.