• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.158-158
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• 2011

$Cu(In_xGa_{1-x})Se_2$ (CIGS) thin film solar cell is one of the most promising solar cells in photovoltaic devices. CIGS has a direct band gap which varied from 1.0 to 1.26 eV, depending on the Ga to In ratio. Also, CIGS has been studying for an absorber in thin film solar cells due to their highest absorption coefficient which is $1{\times}10^5cm^{-1}$ and good stability for deposition process at high temperature of $450{\sim}590^{\circ}C$. Currently, the highest efficiency of CIGS thin film solar cell is approximately 20.3%, which is closely approaching to the efficiency of poly-silicon solar cell. The deposition technique is one of the most important points in preparing CIGS thin film solar cells. Among the various deposition techniques, the sputtering is known to be very effective and feasible process for mass production. In this study, CIGS thin films have been prepared by rf magnetron sputtering method using a single target. The optical and structural properties of CIGS films are generally dependent on deposition parameters. Therefore, we will explore the influence of deposition power on the properties of CIGS films and the films will be deposited by rf magnetron sputtering using CIGS single target on Mo coated soda lime glass at $500^{\circ}C$. The thickness of CIGS films will be measured by Tencor-P1 profiler. The optical properties will be measured by UV-visible spectroscopy. The crystal structure will be analyzed using X-ray diffraction (XRD). Finally the optimal deposition conditions for CIGS thin films will be developed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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• pp.1034-1037
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• 2003

Microcrystalline silicon(c-Si:H) thin-film solar cells are prepared with intrinsic Si-layer by hot wire CVD. The operating parameters of solar cells are strongly affected by the filament temperature ($T_f$) during intrinsic layer. Jsc and efficiency abruptly decreases with elevated $T_f$ to $1400^{\circ}C$. This deterioration of solar cell parameters are resulted from increase of crystalline volume fraction and corresponding defect density at high $T_f$. The heater temperature ($T_h$) are also critical parameter that controls device operations. Solar cells prepared at low $T_h$ ($<200^{\circ}C$) shows a similar operating properties with devices prepared at high $T_f$, i.e. low Jsc, Voc and efficiency. The origins for this result, however, are different with that of inferior device performances at high $T_f$. In addition the phase transition of the silicon films occurs at different silane concentration (SC) by varying filament temperature, by which highest efficiency with SC varies with $T_f$.

• KSTLE International Journal
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• 제7권1호
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• pp.14-17
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• 2006

In this paper, we report on the replication of surface topography of natural leaf of Lotus onto thin polymeric films using a capillarity-directed soft lithographic technique. PDMS molds were used to replicate the surface. The replication was carried out on poly(methyl methacrylate) (PMMA) film coated on silicon wafer. The patterns so obtained were investigated for their friction properties at micro-scale using a ball-on-flat type micro-tribo tester, under reciprocating motion. Soda lime balls (1 mm diameter) were used as counterface sliders. Friction tests were conducted at a constant applied normal load of $3000{\mu}N$ and speed of 1mm/s. All experiments were conducted at ambient temperature ($24{\pm}1^{\circ}C$) and relative humidity ($45{\pm}5%$). Results showed that the patterned samples exhibited superior tribological properties when compared to the silicon wafer and non patterned sample (PMMA thin film). The reduced real area of contact projected by the surfaces was the main reason for their enhanced friction property.

• 한국전기전자재료학회논문지
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• 제16권12S호
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• pp.1175-1180
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• 2003

Transformer Coupled Plasma Chemical Vapor Deposited (TCP-CVD) silicon nitride (SiNx) is widely used as a gate dielectric material for thin film transistors (TFT). This paper reports the SiNx films, grown by TCP-CVD at the low temperature (30$0^{\circ}C$). Experimental investigations were carried out for the optimization o(SiNx film as a function of $N_2$/SiH$_4$ flow ratio varying ,3 to 50 keeping rf power of 200 W, This paper presents the dielectric studies of SiNx gate in terms of deposition rate, hydrogen content, etch rate and leakage current density characteristics lot the thin film transistor applications. And also, this work investigated means to decrease the leakage current of SiNx film by employing $N_2$ plasma treatment. The insulator layers were prepared by two step process; the $N_2$ plasma treatment and then PECVD SiNx deposition with SiH$_4$, $N_2$gases.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.51-51
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• 2012

There is a growing interest in innovative chemical synthesis in microreactors owing to high efficiency, selectivity, and yield. In microfluidic systems, the low-volume spatial and temporal control of reactants and products offers a novel method for chemical manipulation and product generation. Glass, silicon, poly(dimethylsiloxane) (PDMS), and plastics have been used for the fabrication of miniaturized devices. However, these materials are not the best due to either of low chemical durability or expensive fabrication costs. In our group, we have recently addressed the demand for economical resistant materials that can be used for easy fabrication of microfluidic systems with reliable durability. We have suggested the use of various specialty polymers such as silicon-based inorganic polymers and fluoropolymer, flexible polyimide (PI) films that have not been used for microfluidic devices, although they have been used for other areas. And inexpensive lithography techniques were used to fabricate Lab-on-a-Chip type of microreactors with differently devised microchannel design. These microreactors were demonstrated for various synthetic reactions: liquid, liquid-gas organic chemical reactions in heterogeneous catalytic processes, syntheses of polymer and non-trivial inorganic materials. The microreactors were inert, and withstand even harsh conditions, including hydrothermal reaction. In addition, various built-in microstructures inside the microchannels, for example Pd decorated peptide nanowires, definitely enhance the uniqueness and performance of microreactors. These user-friendly Lab-on-a-Chip devices are useful alternatives for chemist and chemical engineer to conventional chemical tools such as glass.

• 한국진공학회지
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• 제5권1호
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• pp.25-32
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• 1996

An ERD-TOF system is constructed for the nondestructive depth profiling of light elements in thin films in the range of several thousand angstroms. The particles, recoiled by 10 $MeV^{35}Cl$ projectiles, were detected by a Time-Of-Flight spectrometer composed of a MCP (Micro Channel Plate) and a SSB (Silicon Surface Barrier) detector. A two parameter data acquisition system composed of two PC's was constructed for registering simultaneous time and energy signals. A $Si_3N_4$/poly-Si/$SiO_2$/Si sample was anlayzed and the result is compared with RBS. The detection limit, maximum probable depth and depth resolution for light elements in silicon are about $4\times10^{14}atoms/\textrm{cm}^2$, 5, 000$\AA$ and 100$\AA$, respectively.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.151-151
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• 2010

In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.

• 대한기계학회논문집A
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• 제39권12호
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• pp.1245-1249
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• 2015

본 연구에서는 나노스케일 박막의 표면주름 형성에 의한 산란반사도 향상을 평가하였다. 실리콘 기판 위에 120 nm 두께의 Poly(methyl metacrylate) 층을 스핀코팅(spin-coating)한 후, 20 nm 의 알루미늄 박막을 증착하여 시편을 제작하였다. 이를 오븐에서 $95^{\circ}C$의 온도로 2 시간 동안 풀림처리하여 표면주름을 형성하였다. 분광광도계로 가시광선 영역의 산란반사도를 측정한 결과 400 nm 파장에서 40%의 증가를 보였으며, 표면주름 위에 100 nm 의 은박막을 추가적으로 증착한 경우 산란반사도가 50%까지 향상되는 것을 확인하였다. 본 연구는 산란반사도의 증대를 요구하는 박막형 소자에 표면주름을 활할 수 있음을 제시한다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.104-104
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• 2009

Critical dimensions has rapidly shrunk to increase the degree of integration and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate insulator layer and the low conductivity characteristic of poly-silicon. To cover these faults, the study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$ and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-silicon gate is not compatible with high-k materials for gate-insulator. To integrate high-k gate dielectric materials in nano-scale devices, metal gate electrodes are expected to be used in the future. Currently, metal gate electrode materials like TiN, TaN, and WN are being widely studied for next-generation nano-scale devices. The TaN gate electrode for metal/high-k gate stack is compatible with high-k materials. According to this trend, the study about dry etching technology of the TaN film is needed. In this study, we investigated the etch mechanism of the TaN thin film in an inductively coupled plasma (ICP) system with $O_2/BCl_3/Ar$ gas chemistry. The etch rates and selectivities of TaN thin films were investigated in terms of the gas mixing ratio, the RF power, the DC-bias voltage, and the process pressure. The characteristics of the plasma were estimated using optical emission spectroscopy (OES). The surface reactions after etching were investigated using X-ray photoelectron spectroscopy (XPS) and auger electron spectroscopy (AES).

• 대한기계학회논문집B
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• 제35권3호
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• pp.221-228
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• 2011

대면적 비정질 실리콘 박막의 결정화는 평판 디스플레이 생산에 있어서 핵심 요소로 꼽힌다. 현재 다양한 결정화 기술들이 연구 되고 있으며 그 중 최근에 소개된 줄 가열 유도 결정화는 수십 마이크로초의 짧은 공정 시간, 대면적 결정화 그리고 국부적인 가열로 기판의 열변형 억제 등의 잇점으로 인해 AMOLED 제작에 있어서 기대되는 기술이다. 본 연구에서는 JIC 공정 중 상변화과정에서의 온도를 이론적으로 해석하고 이를 실험과 비교하였다. 이를 통하여 결정화 메커니즘을 결정하는 임계온도를 in-situ 실험과 수치해석을 통해 밝혀내었다.