• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
• /
• pp.1279-1282
• /
• 2006

An ultra low-power down-conversion level shifter using low temperature poly-crystalline silicon thin film transistors is proposed for mobile applications. The simulation result shows that the power consumption of the proposed circuits is only 17% and the propagation delay is 48% of those of the conventional cross-coupled level shifter without additional area. And the measured power consumption is only 21% of that of the crosscoupled level shifter.

• International Journal of Control, Automation, and Systems
• /
• 제3권3호
• /
• pp.477-485
• /
• 2005

This paper is concerned with the development of a micro tensile testing machine for optically functional materials such as single or poly crystalline silicon and nickel film. This micro tensile tester has been developed for testing various types of materials and dimensions. PZT type actuation is utilized for precise displacement control. The specifications of the PZT actuated micro tensile testers developed are as follows: the volumetric size of the tester is desktop type of 710mm' 200mm' 270mm; the maximum load capacity and the load resolution in this system are IKgf and 0.0152mgf respectively and; the full stroke and the stoke resolution of the PZT actuator are $1000{\mu}m$ and 10nm respectively. Special automatic specimen installing and setting equipment is applied in order to prevent unexpected deformation and misalignment of specimens during handling of specimens for testing. Nonlinearity of the PZT actuator is compensated to linear control input by an inverse compensation method that is proposed in this paper. The strain data is obtained by ISDG method that uses the laser interference phenomenon. To test the reliance of this micro tensile testing machine, a $200{\mu}m$ thickness nickel thin film and SCS (Single Crystalline Silicon) material that is made with the MEMS fabrication process are used.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.493-493
• /
• 2014

The manufacturing cost of thin-film photovoltics can potentially be lowered by minimizing the amount of a semiconductor material used to fabricate devices. Thin-film solar cells are typically only a few micrometers thick, whereas crystalline silicon (c-Si) wafer solar cells are $180{\sim}300\mu}m$ thick. As such, thin-film layers do not fully absorb incident light and their energy conversion efficiency is lower compared with that of c-Si wafer solar cells. Therefore, effective light trapping is required to realize commercially viable thin-film cells, particularly for indirect-band-gap semiconductors such as c-Si. An emerging method for light trapping in thin film solar cells is the use of metallic nanostructures that support surface plasmons. Plasmon-enhanced light absorption is shown to increase the cell photocurrent in many types of solar cells, specifically, in c-Si thin-film solar cells and in poly-Si thin film solar cell. By proper engineering of these structures, light can be concentrated and coupled into a thin semiconductor layer to increase light absorption. In many cases, silver (Ag) nanoparticles (NP) are formed either on the front surface or on the rear surface on the cells. In case of poly-Si thin film solar cells, Ag NPs are formed on the rear surface of the cells due to longer wavelengths are not perfectly absorbed in the active layer on the first path. In our cells, shorter wavelengths typically 300~500 nm are also not effectively absorbed. For this reason, a new concept of plasmonic nanostructure which is NPs formed both the front - and the rear - surface is worth testing. In this simulation Al NPs were located onto glass because Al has much lower parasitic absorption than other metal NPs. In case of Ag NP, it features parasitic absorption in the optical frequency range. On the other hand, Al NP, which is non-resonant metal NP, is characterized with a higher density of conduction electrons, resulting in highly negative dielectric permittivity. It makes them more suitable for the forward scattering configuration. In addition to this, Ag NP is located on the rear surface of the cell. Ag NPs showed good performance enhancement when they are located on the rear surface of our cells. In this simulation, Al NPs are located on glass and Ag NP is located on the rear Si surface. The structure for the simulation is shown in figure 1. Figure 2 shows FDTD-simulated absorption graphs of the proposed and reference structures. In the simulation, the front of the cell has Al NPs with 70 nm radius and 12.5% coverage; and the rear of the cell has Ag NPs with 157 nm in radius and 41.5% coverage. Such a structure shows better light absorption in 300~550 nm than that of the reference cell without any NPs and the structure with Ag NP on rear only. Therefore, it can be expected that enhanced light absorption of the structure with Al NP on front at 300~550 nm can contribute to the photocurrent enhancement.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
• /
• pp.1034-1037
• /
• 2003

Microcrystalline silicon(c-Si:H) thin-film solar cells are prepared with intrinsic Si-layer by hot wire CVD. The operating parameters of solar cells are strongly affected by the filament temperature ($T_f$) during intrinsic layer. Jsc and efficiency abruptly decreases with elevated $T_f$ to $1400^{\circ}C$. This deterioration of solar cell parameters are resulted from increase of crystalline volume fraction and corresponding defect density at high $T_f$. The heater temperature ($T_h$) are also critical parameter that controls device operations. Solar cells prepared at low $T_h$ ($<200^{\circ}C$) shows a similar operating properties with devices prepared at high $T_f$, i.e. low Jsc, Voc and efficiency. The origins for this result, however, are different with that of inferior device performances at high $T_f$. In addition the phase transition of the silicon films occurs at different silane concentration (SC) by varying filament temperature, by which highest efficiency with SC varies with $T_f$.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
• /
• pp.470-470
• /
• 2013

Recently, active materials such as amorphous silicon (a-Si), poly crystalline silicon (poly-Si), transition metal oxide semiconductors (TMO), and organic semiconductors have been demonstrated for flexible electronics. In order to apply flexible devices on the polymer substrates, all layers should require the characteristic of flexibility as well as the low temperature process. Especially, pentacene thin film transistors (TFTs) have been investigated for probable use in low-cost, large-area, flexible electronic applications such as radio frequency identification (RFID) tags, smart cards, display backplane driver circuits, and sensors. Since pentacene TFTs were studied, their electrical characteristics with varying single variable such as strain, humidity, and temperature have been reported by various groups, which must preferentially be performed in the flexible electronics. For example, the channel mobility of pentacene organic TFTs mainly led to change in device performance under mechanical deformation. While some electrical characteristics like carrier mobility and concentration of organic TFTs were significantly changed at the different temperature. However, there is no study concerning multivariable. Devices actually worked in many different kinds of the environment such as thermal, light, mechanical bending, humidity and various gases. For commercialization, not fewer than two variables of mechanism analysis have to be investigated. Analyzing the phenomenon of shifted characteristics under the change of multivariable may be able to be the importance with developing improved dielectric and encapsulation layer materials. In this study, we have fabricated flexible pentacene TFTs on polymer substrates and observed electrical characteristics of pentacene TFTs exposed to tensile and compressive strains at the different values of temperature like room temperature (RT), 40, 50, $60^{\circ}C$. Effects of bending and heating on the device performance of pentacene TFT will be discussed in detail.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2009년도 제38회 동계학술대회 초록집
• /
• pp.151-151
• /
• 2010

In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.

• Macromolecular Research
• /
• 제12권2호
• /
• pp.156-171
• /
• 2004

We describe the precision synthesis schemes of siloxane-containing polymers, i.e., the control of their molecular weight, stereoregularity, and higher-order structures. First, we found a new catalytic dehydrocoupling reaction of water with bis(dimethylsilyl)benzene to give poly(phenylene-disiloxane). Together with this reaction, we applied hetero-condensations to the synthesis of thermally stable poly(arylene-siloxane)s. The dehydrocoupling reaction was applied to the synthesis of syndiotactic poly(methylphenylsiloxane) and poly(silsesquioxane)s, which we also prepared by hydrolysis and deaminative condensation reactions. We discuss the tendency for loop formation to occur in the synthesis of poly(silsesquioxane) by hydrolysis, and provide comments on the design of functionality of the polymers produced. By taking advantage of the low energy barrier to rotation in the silicon-oxygen bond, we designed selective oxygen-permeable membrane materials and liquid crystalline materials. The low surface free energy of siloxane-containing systems allows surface modification of a blend film and the design of holographic grating materials.

• 한국재료학회지
• /
• 제17권2호
• /
• pp.73-80
• /
• 2007

For the sub-65 nm CMOS process, it is necessary to develop a new silicide material and an accompanying process that allows the silicide to maintain a low sheet resistance and to have an enhanced thermal stability, thus providing for a wider process window. In this study, we have evaluated the property and unit process compatibility of newly proposed composite silicides. We fabricated composite silicide layers on single crystal silicon from $10nm-Ni_{1-x}Co_x/single-crystalline-Si(100),\;10nm-Ni_{1-x}Co_x/poly-crystalline-\;Si(100)$ wafers (x=0.2, 0.5, and 0.8) with the purpose of mimicking the silicides on source and drain actives and gates. Both the film structures were prepared by thermal evaporation and silicidized by rapid thermal annealing (RTA) from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, surface composition, were investigated using a four-point probe, a field emission scanning probe microscope, a field ion beam, an X-ray diffractometer, and an Auger electron depth profi1ing spectroscopy, respectively. Finally, our newly proposed composite silicides had a stable resistance up to $1100^{\circ}C$ and maintained it below $20{\Omega}/Sg$., while the conventional NiSi was limited to $700^{\circ}C$. All our results imply that the composite silicide made from NiCo alloy films may be a possible candidate for 65 nm-CMOS devices.

• 한국재료학회지
• /
• 제8권11호
• /
• pp.1067-1073
• /
• 1998

CO와 $H_2$의 탄소원을 사용한 마이크로파 플라즈마 화학기상증착 방법으로 SOD 구조에 적용될 양질의 다이아몬드 박막을 형성하였고, SOD 구조를 형성하기 위해 diamond/Si(100) 구조 위에 poly-Si 박막을 저압화학기상 증착법으로 제작하였다. CO/$H_2$탄소원의 유량비 증가에 따라 다이아몬드의 결정은 octahedron 구조에서 cubo-octahedron 구조로 바뀌었으며, 결정면은 {111}과 {100}으로 혼합되어 형성되었다. 비정질 carbon과 non-diamond성분이 없는 양질의 다이아몬드 박막은 CO/$H_2$의 유량비가 0.18일 때 형성되었으며, 주 결정상은 (111) 면이었다. diamond/Si(100) 계면은 void가 없는 평활한 계면을 이루었으며, 다이아몬드 박막의 유전상수, 누설전류와 비저항은 각각 $5.31\times10^{-9}A/cm^2$ 그리고 $9\times{10^7}{\Omega}cm$이었다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
• /
• pp.1261-1262
• /
• 2008

Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.