• Title/Summary/Keyword: Poly-Si TFT's

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Mobility Determination of Thin Film a-Si:H and poly-Si

  • Jung, S.M.;Choi, Y.S.;Yi, J.S.
    • Journal of Sensor Science and Technology
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    • v.6 no.6
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    • pp.483-490
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    • 1997
  • Thin film Si has been used in sensors, radiation detectors, and solar cells. The carrier mobility of thin film Si influences the device behavior through its frequency response or time response. Since poly-Si shows the higher mobility value, a-Si:H films on Mo substrate were subjected to various crystallization treatments. Consequently, we need to find an appropriate method in mobility measurement before and after the anneal treatment. This paper investigates the carrier mobility improvement with anneal treatments and summarizes the mobility measurement methods of the a-Si:H and poly-Si film. Various techniques were investigated for the mobility determination such as Hall mobility, HS, TOF, SCLC, TFT, and TCO method. We learned that TFT and TCO method are suitable for the mobility determination of a-Si:H and poly-Si film. The measured mobility was improved by $2{\sim}3$ orders after high temperature anneal above $700^{\circ}C$ and grain boundary passivation using an RF plasma rehydrogenation.

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Characteristics of Polycrystalline Silicon TFT with Stress-Bias (스트레스에 따른 다결정 실리콘 TFT의 영향)

  • Baek, Do-Hyun;Lee, Yong-Jae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.05b
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    • pp.233-236
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    • 2000
  • Polycrystalline Silicon Thin Film Transistors(Poly-Si TFT's), fabricated at temperature lower than $600^{\circ}C$ are now largely used in many applications, particularly in large area electrons. In this work, electrical stress effects on Poly-Si TFT's fabricated by Solid Phase Crystal(SPC) was investigated by measuring electric properities such as transfer and output characteristics, and channel conductance. Consequently, It is turned out that it should be noted the output characteristics, drain current and channel conductance, strongly degrade around origin.

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Engineered Tunnel Barrier Ploy-TFT Memory for System on Panel

  • Yu, Hui-Uk;Lee, Yeong-Hui;Jeong, Hong-Bae;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.128-128
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    • 2011
  • Polysilicon thin-film transistors (poly-Si TFTs)는 능동행렬 액정 표시 소자(AMLCD : Active Matrix Liquid Crystal Display)와 DRAM과 같은 메모리 분야에 폭넓게 적용이 가능하기 때문에 많은 연구가 진행되고 있다. 최근 poly-Si TFTs의 우수한 특성으로 인하여 주변 driving circuits에 직접화가 가능하게 되었다. 또한 디스플레이 LCD 패널에 controller와 메모리와 같은 다 기능의 장치을 직접화 하여 비용의 절감과 소자의 소형화가 가능한 SOP (System on panels)에 연구 또한 진행 되고 있다. 이미 잘 알려진 바와 같이 비휘발성 메모리는 낮은 소비전력과 비휘발성이라는 특성 때문에 이동식 디바이스에 데이터 저장 장치로 많이 사용되고 있다. 하지만 플로팅 타입의 비휘발성 메모리는 제작공정의 문제로 인하여 SOP의 적용에 어려움을 가지고 있다. SONOS 타입의 메모리는 빠른 쓰기/지우기 효율과 긴 데이터 유지 특성을 가지고 있으나 소자의 스케일링 따른 누설전류의 증가와 10년의 데이터 보존 특성을 만족 시킬 수 가 없는 문제가 발생한다. 본 연구에서는 SOP 적용을 위하여 ELA 방법을 통하여 결정화한 poly-Si TFT memory를 SiO2/Si3N4/SiO2 Tunnel barrier와 High-k HfO2과 Al2O3을 Trapping layer와 Blocking layer로 적용, 비휘발성 메모리을 제작하여 전기적 특성을 알아보았다.

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Analysis on Degradation of Poly-Si TFT`s and Fabrication of Depressed Poly-Si TFT (열화가 억제된 다결성 실리콘 박막 트랜지스터의 제작 및 소자의 열화 특성 분석)

  • Kim, Yong-Sang;Park, Jin-Seok;Jo, Bong-Hui;Gil, Sang-Geun;Kim, Yeong-Ho
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.10
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    • pp.489-493
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    • 2001
  • The on-current of offset and LDD structured devices in slightly decreased while the off-current are remarkably reduced and almost constant independent of gate and drain voltage because offset and LDD regions behave as a series resistance and reduce the lateral electric field in the drain depletion. Degradation of these devices is dependent upon the offset and LDD length rather than doping concentration in these regions. Also, degradation mechanism has been related to the interface generation rather than the hot carrier injection into gate oxide.

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Electrical Characteristics and Leakage Current Mechanism of High Temperature Poly-Si Thin Film Transistors (고온 다결정 실리콘 박막트랜지스터의 전기적 특성과 누설전류 특성)

  • 이현중;이경택;박세근;박우상;김형준
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.10
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    • pp.918-923
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    • 1998
  • Poly-silicon thin film transistors were fabricated on quartz substrates by high temperature processes. Electrical characteristics were measured and compared for 3 transistor structures of Standard Inverted Gate(SIG), Lightly Doped Drain(LDD), and Dual Gate(DG). Leakage currents of DG and LDD TFT's were smaller that od SIG transistor, while ON-current of LDD transistor is much smaller than that of SIG and DG transistors. Temperature dependence of the leakage currents showed that SIG and DG TFT's had thermal generation current at small drian bias and Frenkel-Poole emission current at hight gate and drain biases, respectively. In case of LDD transistor, thermal generation was the dominant mechanism of leakage current at all bias conditions. It was found that the leakage current was closely related to the reduction of the electric field in the drain depletion region.

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A Study on the Hot-Carrier Effects of p-channel poly-Si TFT (p-채널 po1y-Si TFT 소자의 Hot-Carrier효과에 관한 연구)

  • 진교원;박태성;이제혁;백희원;변문기;김영호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.266-269
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    • 1997
  • Hot carrier effects as a function of bias stress time and bias stress conditions were syste-matica1ly investigated in p-channel po1y-Si TFT's fabricated on the quartz substrate. The device degradation was observed for the negative bias stress. After positive bias stressing, Improvement of electrical characteristic except for subthreshold slope was observed. It was found that these results were related to the hot carrier injection into the gate oxide and interface states at the poly-Si/SiO$_2$interface rather than defects states generation under bias stress.

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High rate deposition of poly-si thin films using new magnetron sputtering source

  • Boo, Jin-Hyo;Park, Heon-Kyu;Nam, Kyung-Hoon;Han, Jeon-Geon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.186-186
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    • 2000
  • After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

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The Study of poly-Si Eilm Crystallized on a Mo substrate for a thin film device Application (박막소자응용을 위한 Mo 기판 위에 고온결정화된 poly-Si 박막연구)

  • 김도영;서창기;심명석;김치형;이준신
    • Journal of the Korean Vacuum Society
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    • v.12 no.2
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    • pp.130-135
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    • 2003
  • Polycrystalline silicon thin films have been used for low cost thin film device application. However, it was very difficult to fabricate high performance poly-Si at a temperature lower than $600^{\circ}C$ for glass substrate because the crystallization process technologies like conventional solid phase crystallization (SPC) require the number of high temperature (600-$1000^{\circ}C$) process. The objective of this paper is to grow poly-Si on flexible substrate using a rapid thermal crystallization (RTC) of amorphous silicon (a-Si) layer and make the high temperature process possible on molybdenum substrate. For the high temperature poly-Si growth, we deposited the a-Si film on the molybdenum sheet having a thickness of 150 $\mu\textrm{m}$ as flexible and low cost substrate. For crystallization, the heat treatment was performed in a RTA system. The experimental results show the grain size larger than 0.5 $\mu\textrm{m}$ and conductivity of $10^{-5}$ S/cm. The a-Si was crystallized at $1050^{\circ}C$ within 3min and improved crystal volume fraction of 92 % by RTA. We have successfully achieved a field effect mobility over 67 $\textrm{cm}^2$/Vs.

Characteristics of Poly-Si TFTs Fabricated on Flexible Substrates using Sputter Deposited a-Si Films

  • Kim, Y.H.;Moon, D.G.;Kim, W.K.;Han, J.I.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.297-300
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    • 2005
  • The characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated using sputter deposited amorphous silicon (a-Si) precursor films are investigated. The a-Si films were deposited on flexible polymer substrates using argon-helium mixture gases to minimize the argon incorporation into the film. The precursor films were then laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated pMOS TFT showed field-effect mobility of $32.4cm^2/V{\cdot}s$ and on/off ratio of $10^6$.

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Degradation of Polycrystalline Silicon Thin Film Transistor by Inducing Stress (스트레스 인가에 의한 다결정 실리콘 박막 트랜지스터의 열화 특성)

  • 백도현;이용재
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.322-325
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    • 2000
  • N-channel poly-Si TFT, Processed by Solid Phase Crystalline(SPC) on a glass substrate, has been investigated by measuring its electrical properties before and after electrical stressing. It is observed that the threshold voltage shift due to electrical stress varies with various stress conditions. Threshold voltages measured in 1.5$\mu\textrm{m}$ and 3$\mu\textrm{m}$ poly-Si TFTs are 3.3V, 3.V respectively. With the threshold voltage shia the degradation of transconductance(G$\_$m/) and subthreshold swing(S) is also observed.

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