• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.22 no.9
• /
• pp.1941-1948
• /
• 1997

In this paper, the power efficient linear upconversion mixer which is a functional circuit in transmit path of intermediate frequency(IF) part of Code Division Multiple (CDMA) cellular phone was explained. In generally, the low CMOS devices limits the implementation of upconversion mixer especially for lower loads. Using replica transconductor, the linear range is extended up to the limit. Thiscircuit was imprlemented using $0.8{\mu}\textrm{m}$ N-well CMOS technology with 2-poly/2-metal. The active area of chip is $0.53mm{\times}0.92mm$. The power consumption is 30mW with 3.3V suply voltage. The 1dB conpression characteristics is -27.3dB with $25{\Omega}$. load and being applied by 2-tone input signal. The mixer operates properly above 200MHz.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.14 no.3
• /
• pp.189-196
• /
• 1989

In this paper, BICMOS gate array technology that has CMOS devices for logic applications and bipolar devices for driver applications is presented. An optimized poly gate p-well CMOS process is chosen to fabricate the BICMOS gate array system and the basic concepts to design these devices are to improve the characteristics of bipolar & CMOS device with simple process technology. As the results hFE value is 120(Ic=1mA) for transistor, and there is no short channel effects for CMOS devices which have Leff to 1.25um and 1.35um for n-channel, respectively, 0.8nx gate delay time of 41 stage ring oscillators is obtained.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.36C no.5
• /
• pp.27-37
• /
• 1999

A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.42 no.6 s.336
• /
• pp.1-8
• /
• 2005

In this paper, CMOS A/D converter with 6bit 2GSPS Nyquist input at 1.8V is designed. In order to obtain the resolution of 6bit and the character of high-speed operation, we present an Interpolation type architecture. In order to overcome the problems of high speed operation, a novel One-zero Detecting Encoder, a circuit to reduce the Reference Fluctuation, an Averaging Resistor and a Track & Hold, a novel Buffered Reference for the improved SNR are proposed. The proposed ADC is based on 0.18um 1-poly 3-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply and occupies chip area of 977um $\times$ 1040um. Experimental result show that SNDR is 36.25 dB when sampling frequency is 2GHz and INL/DNL is $\pm$0.5LSB at static performance.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.6 s.348
• /
• pp.53-61
• /
• 2006

In high speed flash type or pipelining type A/D Converter, the faster sampling frequency is, the more the effect of DC reference fluctuation is increased by clock feed-through and kick-back. When we measure A/D Converter, further, external noise increases reference voltage fluctuation. Thus reference fluctuation reduction circuit must be needed in high speed A/D converter. Conventional circuit simply uses capacitor but layout area is large and it's not efficient. In this paper, a reference fluctuation reduction circuit using transmission gate is proposed. In order to verify the proposed technique, we designed and manufactured 6bit 2GSPS CMOS A/D converter. The A/D converter is based on 0.18um 1-poly 5-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies chip area of $977um\times1040um$. Experimental result shows that SNDR is 36.25 dB and INL/DNL ${\pm}0.5LSB$ when sampling frequency is 2GHz.

• Bulletin of the Korean Chemical Society
• /
• v.32 no.5
• /
• pp.1650-1656
• /
• 2011

A series of potent tricyclic derivatives with a non-aromatic amide as potent PARP-1 inhibitors were successfully synthesized and their PARP-1 inhibitory activity was evaluated. Among the derivatives, 2-(1-propylpiperidin-4-yloxy)-7,8,9,10-tetrahydrophenanthridin-6(5H)-one 23c displayed potent activity in a PARP-1 enzymatic assay and cell-based assay ($IC_{50}$ = 0.142 ${\mu}M$, $ED_{50}$ = 0.90 ${\mu}M$) with good water solubility. Further, molecular modeling studies confirmed the obtained biological results.

• Journal of Nutrition and Health
• /
• v.36 no.4
• /
• pp.382-388
• /
• 2003

(-)-Epigallocatechin-3-gallate (EGCG) is a polyphenolic compound found in peen tea leaves, and has been known to be one of the most potent catechin species which inhibits cell growth most possibly through an apoptotic cell death. We investigated the apoptotic activity of (-)-EGCG on the human myeloid leukemia cell line, HL-60. Our results of MTT test indicated that (-)-EGCG had a significant antiproliferation effect in HL-60 cells with $IC_{50}$/ (50% inhibition concentration) value of 65 $\mu$M. Giemsa statining of HL-60 cells treated with (-)-EGCG (100 $\mu$M) for 6hrs showed a typical apoptosis-specific morphological change including shrinkage of the cytoplasm, membrane blobbing and compaction of the nuclear chromatin. The DNA fragmentation was observed from the agarose gel electrophoresis of cells treated with (-)-EGCG for 3hrs or longer, and was progressed to a greater degree as treatment time increases. Treatment of the cells with (-)-EGCG (100 $\mu$M) resulted in a rapid release of mitochondrial cytochrome c into the cytosol, and a subsequent cleavage of caspase-3 to an active form in a treatment-time dependent manner. (-)-EGCG (100 $\mu$M) also stimulated proteolytic cleavage of poly-(ADP-ribose) polymerase (PARP) to an active form in HL-60 cells. Tlken together, (-)-EGCG appears to induce the apoptosis in human myeloid leukemia cells via a caspase-dependent pathway. These results suggest the possible application of (-)-EGCG, the major active compound in green tea, as an antiproliferative agent for cancer prevention.

• 전자공학회논문지 IE
• /
• v.47 no.2
• /
• pp.13-20
• /
• 2010

This paper describes a current mode PWM DC-DC converter IC for battery charger and supply power converter for portable electronic devices. The maximum supply voltage of IC is 40[V] and 2.8[V]~330[V] DC input power is converted to higher or programmed DC voltage according to external resistor ratio or wire winding ratio of transformer. The maximum supply output current is 3[A] over and voltage error of output node is within 3[%]. The whole circuit needed current mode PWM DC-DC converter circuit is designed. The package dimensions and number of external parts are minimized in order to get a smaller hardware size. The power consumption is smaller then 1[mW] at stand by period with supply voltage of 3.6[V] and maximum energy conversion efficiency is about 86[%]. This device has been designed in a 0.6[um] double poly, double metal 40[V] CMOS process and whole chip size is 2100*2000 [um2].

• Journal of the Institute of Electronics and Information Engineers
• /
• v.51 no.5
• /
• pp.219-225
• /
• 2014

This paper describes an IC for Power Factor Correction. It can use electrical appliances which convert power from AC to DC. The power factor can be influenced not only phase difference of voltage and current but also sudden change of current waveform. This circuit enables current wave supplied to load by close to sinusoidal and minimum phase difference of voltage and current waveform. A self oscillated 10[kHz]~100[kHz] pulse signal converted to PWM waveform and it chops rectified full wave AC power which flows to load device. The multiplier and zero current detector circuit, UVLO, OVP, BGR circuits were designed. This IC has been designed and whole chip simulation use 0.5[um] double poly, double metal 20[V] CMOS process.

• Composites Research
• /
• v.15 no.6
• /
• pp.8-15
• /
• 2002

In this work, the effect of biodegradable poly(butylene succinate)(PBS) in difunctional epoxy(21:P) resin was investigated in terms of rheological properties, cure kinetics, thermal stabilities, and mechanical interfacial properties. Rheological properties of the blend system were measured under isothermal condition using a rheometer. Cross-linking activation energies($\textrm{E}_c$) were determined from the Arrhenius equation based on gel time and curing temperature. The $\textrm{E}_c$ was increased in the presence of 10 wt% PBS as compared with neat 2EP. From the DSC results of the blends, the cure activation energies($\textrm{E}_a$) showed a similar behavior with $\textrm{E}_c$ due to the increased intermolecular interaction between 2EP and PBS. The decomposed activation energies($\textrm{E}_t$) for the thermal stability derived from the integral method of Horowitz-Metzger equation, were also increased in 10 wt% PBS. In addition, 20 wt% PBS showed the highest critical stress intensity factor($\textrm{E}_{IC}$). which was explained by increasing the fracture toughness of the 2EP/PBS blend systems.