• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1948-1950
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• 2005

In the recent years, much interests and attraction has been paid on the plasma display panel. To achieve high performance display panel, there has been a strong demands for studies on the transparent conducting films such as ITO and ZnO. In this study, we propose PDP cell with ZnO transparent conducting electrode. The electrical and optical characteristics of PDP cell with ZnO transparent electrode were studied and compared with that of conventional ITO electrode.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.832-835
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• 2003

By using vacuum in-line driving and photoluminescence measuring method, we have observed the electrical and optical characteristics of the vacuum in-line sealing technology and analyzed the effect of the base vacuum level before filling the plasma gas. In the case of base vacuum level of $1{\times}10^{-3}$torr, the firing voltage of a 2-inch diagonal PDP panel was ranged from 310 to 345V depending on the plasma gas pressure of 200 to 300torr and luminous efficiency was ranged from 0.0227 to 0.0367 lm/W depending on the input voltage level of 330 to 225V. While, in the case of $1{\times}10^{-6}$, the characteristics were significantly improved. As a results, the firing voltage was ranged from 295 to 318V and luminous efficiency was from 0.0278 to 0.0451 lm/W.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.227-227
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• 1999

Plasma display panel(PDP) is a leading technology for large-area flat panel displays. A current issue in operating the PDP cell is that the efficiency of the PDP cell is very low. To increase the efficiency of the PDP cell, the visible light needs to be maximized and the power consumption minimized. Since the excited xenons are related to the production of the visible light, it is important to optimize the cell geometry and the gas composition that produce the excited xenons more efficiently. A 2D-fluid code (FL2P) is developed and used to simulate the plasma dynamics and the radiation transport in the PDP cell. The cell is optimized with the code for various operating conditions and cell dimensions such as the voltage pulse, electrode length, electrode spacing, gap size, dielectric constant, gas mixture ratio, pressure, and pulse duration.

• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.5
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• pp.183-190
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• 2005

In order to drive the high-density plasma displays, a high-speed driving technology must be researched. In this experiment, the relationship between the width of the address electrode and high-speed driving is analyzed using the Vt close curve and the panel structure for high-speed driving is proposed. In addition we show that the wider the width of the address electrode is, the narrower the width of the scan pulse becomes. Therefore, we could achieve the minimum data voltage of 50.1V at a scan pulse width of $1.0/{\mu}s$ and a ramp voltage of 210V at an address electrode width of $180/{\mu}m$ for the high-speed driving 4-inch test PDP.

• Journal of Information Display
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• v.1 no.1
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• pp.42-47
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• 2000

The relationship between driving voltage and the amount of wall charge in the address period of surface discharge type AC Plasma Display Panel has been investigated. The amount of wall charge on each electrode is obtained simultaneously from the current profiles after applying only one addressing discharge pulse. The wall charge $Q_y$ on the scan electrode Y is almost the sum of $Q_x$ on the address electrode X and $Q_z$ on the sustain electrode Z. The $Q_y$ increased with the driving voltage regardless of the kind of electrode, whereas the addressing $T_d$ decreased. The $Q_x$ and $Q_y$ are increased considerably by blocking voltage $V_z$, whereas $Q_x$ is decreased. The $V_z$ dependence of $Q_x$ $Q_y$ and ${\varrho}_z$ in addressing discharge was $-13{\times}10^{-2}$ (pc/$V_z$), and $60{\times}10^{-2}$ ($pc/V_z$) and $70{\times}10^{-2}(pc/V_z)$, respectively.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.704-708
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• 2004

Recently, many nation have released standard such as IEC 61000-3-2 and IEEE 59, which impose a limit on the harmonic current drawn by equipment connected to AC line in order to prevent the distortion of an AC Line. Therefore, Plasma Display Panel (PDP) which is highlightened in digital display device also has the Power Factor Correction (PFC) circuit to meet the harmonic requirements. In PDP power module, the conventional boost converter is usually used for the PFC circuit. However, it comes serious thermal problem on it's bridge diode due to heat of PDP, and therefore the system stability is not guaranteed. In this paper, the bridgeless boost converter, which is used for PFC circuit of the PDP power module, is designed and verified the possibility of the application in a practical product in a view of efficiency, component count, temperature and etc.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.917-920
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• 2006

In an attempt to reduce processing cost and to improve resolution of PDPs, micro mold transfer processing route for barrier ribs of plasma display panel was developed. In this study, the parameters that may cause defects during the process were identified, which include the shrinkage during UV curing process, stress due to evaporation of organic components, and sintering shrinkage. Considering such parameters, UV curable paste was developed and barrier ribs of PDPs were successfully processed via the process. In addition, the process was successfully applied for the processing of barrier ribs with embedded counter electrodes.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1189-1192
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• 2008

A new mercury-free flat fluorescent lamp with a single cell having dimension 2.2inches across the diagonal, had been developed which shows a wide, stable operating voltage margin, high luminance and luminous efficacy by adopting the bipolar pulse drive scheme. In this paper, the single cell is expanded into a multi-structured configuration to realize a 32inch sized panel across the diagonal by a simple repetition of the single cells. A driving scheme is proposed for a 2-bit areal selective dimming using dual auxiliary electrodes and bipolar drive scheme.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1830-1833
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• 2002

We measured 3-dimensional temporal behavior of the light emitted from AC plasma display panel(PDP) at various auxiliary voltage pulse width supplied to the address electrode in sustain period using scanned point detecting system. In the case of applying an auxiliary address voltage pulse, the light emission starts at the inner edges of the cathode so the larger discharge volume toward address electrode can be obtained compared with the normal sustain discharge. Especially, when the auxiliary voltage pulse width is the $2{\mu}s$, the maximum luminance and long emission time can be obtained.

• Journal of the Semiconductor & Display Technology
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• v.7 no.2
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• pp.63-67
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• 2008

The MgO protective layer plays an important role in plasma display panels (PDPs). Our previous work demonstrated that the properties of MgO thin film could be improved, which were deposited by ion beam assisted deposition (IBAD). However arc discharge always occurs during the IBAD process. To avoid this problem, oxygen neutral beam assisted deposition (NBAD) is used to deposit MgO thin films in this paper. The energy of the oxygen neutral beam was used as the parameter to control the deposition. The experimental results showed that the oxygen neutral beam energy was effective in determining in F/$F^+$ centers, crystal orientation, surface morphology of the MgO thin film, and the discharge characteristics of AC PDP. The lowest firing voltage $(V_f)$ and the highest secondary electron emission coefficient $(\gamma)$ were obtained when the neutral beam energy was 300 eV.