• Journal of the Korean Society of Manufacturing Process Engineers
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• v.12 no.2
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• pp.75-80
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• 2013

Cathode is an essential component used in plasma etching process which is to make micro pattern on the silicon wafer. The currently used cathodes produce particles at the high temperature plasma etching process. To overcome this problem, a 'Silicon Only Cathode' was developed. This 'Silicon Only Cathode' requires manufacturing process changes due to the change of shapes, material features, and machining characteristics of work materials. This research investigates the small hole drilling process. The conclusion is that PCD drills with twist angles of $20^{\circ}$ and $25^{\circ}$ were tested for small hole drilling and the experimental results indicate that the drill with $25^{\circ}$ twist angle drill causes less thrust force.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.3
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• pp.566-570
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• 2007

The specific electrical, optical and acoustic properties of Zinc Oxide (ZnO) are important for semiconductor process which has many various applications. Piezoelectric ZnO films has been widely used for such as transducers, bulk and surface acoustic-wave resonators, and acousto-optic devices. In this study, we investigated etch characteristics of ZnO thin films in inductively coupled plasma etch system with $BCl_3/Ar$ gas mixture. The etching characteristics of ZnO thin films were investigated in terms of etch rates and selectivities to $SiO_2$ as a function of $BCl_3/Ar$ gas mixing ratio, RF power, DC bias voltage and process pressure. The maximum ZnO etch rate of 172 nm/min was obtained for $BCl_3$ (80%)/Ar(20%) gas mixture. The chemical states on the etched surface were investigated with X-ray photoelectron spectroscopy (XPS).

• Proceedings of the Materials Research Society of Korea Conference
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• 1994.11a
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• pp.165-165
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• 1994

• Korean Journal of Materials Research
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• v.19 no.3
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• pp.132-136
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• 2009

This study investigates GaAs dry etching in capacitively coupled $BCl_3/N_2$ plasma at a low vacuum pressure (>100 mTorr). The applied etch process parameters were a RIE chuck power ranging from $100{\sim}200W$ on the electrodes and a $N_2$ composition ranging from $0{\sim}100%$ in $BCl_3/N_2$ plasma mixtures. After the etch process, the etch rates, RMS roughness and etch selectivity of the GaAs over a photoresist was investigated. Surface profilometry and field emission-scanning electron microscopy were used to analyze the etch characteristics of the GaAs substrate. It was found that the highest etch rate of GaAs was $0.4{\mu}m/min$ at a 20 % $N_2$ composition in $BCl_3/N_2$ (i.e., 16 sccm $BCl_3/4$ sccm $N_2$). It was also noted that the etch rate of GaAs was $0.22{\mu}m/min$ at 20 sccm $BCl_3$ (100 % $BCl_3$). Therefore, there was a clear catalytic effect of $N_2$ during the $BCl_3/N_2$ plasma etching process. The RMS roughness of GaAs after etching was very low (${\sim}3nm$) when the percentage of $N_2$ was 20 %. However, the surface roughness became rougher with higher percentages of $N_2$.

• Electrical & Electronic Materials
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• v.9 no.2
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• pp.188-195
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• 1996

The AlSi etching process using the MERIE type reactor carried out with different process parameters such as C1$_{2}$ and N$_{2}$ gas flow rate, RF power and chamber pressure. The etching characteristics were evaluated in terms of etch rate, selectivity, uniformity and etched profile. As the N2 gas flow rate is increased, the AlSi etch rate is decreased and uniformity has remained constant within .+-.5%. The etch rate is increased and uniformity is decreased, according to increment of the C1$_{2}$ gas flow rate, RF power and chamber pressure. Selective etching of TEOS with respect to AlSi is decreased as the RF power is increased while it is increased by increment of the C1$_{2}$ gas flow rate and chamber pressure, on the other hand, selective etching of photoresist with respect to AlSi is increased by increment of the C1$_{2}$ gas flow rate and chamber pressure, it is decreased as the N$_{2}$ gas flow rate is increased.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.102-102
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• 2008

Sapphire (${\alpha}-Al_2O_3$) has been used as the substrate of opto-electronic device because of characteristics of thermal stability, comparatively low cost, large diameter, optical transparency and chemical compatibility. However, there is difficulty in the etching and patterning due to the physical stability of sapphire and the selectivity with sapphire and mask materials [1,2]. Therefore, sapphire has been studied on the various fields and need to be studied, continuously. In this study, the etching properties of sapphire substrate were investigated with various $CH_4$/Ar gas combination, radio frequency (RF) power, DC-bias voltage and process pressure. The characteristics of the plasma were estimated for mechanism using optical emission spectroscopy (OES). The chemical compounds on the surface of sapphire substrate were investigated using energy dispersive X-ray (EDX). The chemical reaction on the surface of the etched sapphire substrate was observed by X-ray photoelectron spectroscopy (XPS). Scanning electron microscopy (SEM) was used to investigate the vertical and slope profiles.

• Transactions on Electrical and Electronic Materials
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• v.15 no.1
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• pp.49-54
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• 2014

In this study, we carried out an investigation of the etch characteristics of silicon (Si) film, and the selectivity of Si to $SiO_2$ in $SF_6/O_2$ plasma. The etch rate of the Si film was decreased on adding $O_2$ gas, and the selectivity of Si to $SiO_2$ was increased, on adding $O_2$ gas to the $SF_6$ plasma. The optical condition of the Si film with this work was 1,350 nm/min, at a gas mixing ratio of $SF_6/O_2$ (=130:30 sccm). At the same time, the etch rate was measured as functions of the various etching parameters. The X-ray photoelectron spectroscopy analysis showed the efficient destruction of oxide bonds by ion bombardment, as well as the accumulation of high volatile reaction products on the etched surface. Field emission auger electron spectroscopy analysis was used to examine the efficiency of the ion-stimulated desorption of the reaction products.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.1
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• pp.99-102
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• 2002

Pinholes on the thermally grown oxide, which is called gate oxide, on silicon substrate under polysilicon layer are found and its mechanism is analyzed in this paper. The oxide under a polysilicon layer is broken during the plasma etching process of other polysilicon layer. Both polysilicon layers are separated with 0.8${\mu}{\textrm}{m}$ thick oxide deposited by CVD (Chemical Vapor Deposition). Since broken oxide points are found scattered around an arc occurrence point, it is assumed that an extremely high electric field generated near the arc occurrence point makes the gate oxide broken. 1'he arc occurrence point has been observed on the alignment key and is the mark of low yield. It is found that any arc occurrence can cause chips to fail by breaking the gate oxide, even if are occurrence points are found on scribeline.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.31 no.7
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• pp.53-62
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• 2003

• Journal of IKEEE
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• v.13 no.4
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• pp.23-27
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• 2009

Ohmic contact formation and etching processes for the fabrication of MBE (molecular beam epitaxy) grown GaSb-based p-channel HEMT devices on Si substrate have been studied. Firstly, mesa etching process was established for device isolation, based on both HF-based wet etching and ICP-based dry etching. Ohmic contact process for the source and drain formation was also studied based on Ge/Au/Ni/Au metal stack, which resulted in a contact resistance as low as $0.683\;{\Omega}mm$ with RTA at $320^{\circ}C$ for 60s. Finally, for gate formation of HEMT device, gate recess process was studied based on AZ300 developer and citric acid-based wet etching, in which the latter turned out to have high etching selectivity between GaSb and AlGaSb layers that were used as the cap and the barrier of the device, respectively.