• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.4
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• pp.557-564
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• 1986

This paper describes a standard cell placement strategy which consists of three kconsecutive steps` initial placement, iterative placement improvement, and string placement. In the initial placement step, cell placement was done by solving the linear ordering problem for a one-dimensional layout of standard cells and then zigzaging the resultant linear order width in the chip plane. The iterative placement improvement step is based on the iterative pairwise interchange using the estimated total routing length as a figure-or -merit. The string placement is used to reorder cells and terminals in each etandard cell row such that channel routing in the adjacent channels is not blocked by cyclic constraints and needs fewer routing tracks. The placement program is coded in PASCAL and kimplemented on a VAX-11/750 computer. Experimental results for several examples are included.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.10
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• pp.1598-1605
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• 1989

This paper describes an efficient global cell (module) placement strategy called HALO (Hierarchical Alternating Linear Ordering)which generates global 2-D placement of circuit modules by hierarchical application of linear ordering in alternating direction. We tried, in principle, to explain why HALO should perform better than other typical, somehat successful, analytical approaches such as min-cut, force-directed relaxation(FDR)or its likes. We have implemented HALO as a program for standard cell placement. Experimental results on two benchmark circuits, primary and primary 2 consisting of 752 and 2907 cells, respectively have shown a decrease of half-perimeter routing length by 7% and 24%, respectively compared to the best available results obtained so far. Total CPU time including the following detailed placement was less than half of the earlier work.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.6
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• pp.1049-1055
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• 1987

This paper describes a near-optimal standard cell layout strategy which consists of three consecutives steps` partition, placement, and routing. In the partition step, a given network is torn apart into many subnetworks such that each subnetworks contains as many cells as possible with minimum interocnnections between subnetwork. In the placement step, the conventional string placement algorithm was modified. Also, bonding pads were placed such that their connections to the related cells are shortest. As a result for the tested example, the placement time was saved by 60% and the total routing lengths were saved by more than 20% and substantial improvements in the number of feed-through cell and the track density were obtained. The layout program is coded in PASCAL and implemented on a VAX 11-750/UNIX computer.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.10
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• pp.595-602
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• 2003

This Paper presents an efficient hybrid techniques for a standard cell placement. The prototype tool adopts a middle-down methodology in which an n${\times}$m grid is imposed over the layout area and cells are assigned to bins forming a global placement. The optimization technique applied in this phase is based on the Relaxation-Based Local Search (RBLS) framework [12］in which a combinatorial search mechanism is driven by an analytical engine. This enables a more global view of the problem and results in complex modifications of the placement in a single search“move.”Details of this approach including a novel placement legalization procedure are presented. When a global placement converges, a detailed placement is formed and further optimized by the optimal interleaving technique[13］. Experimental results on MCNC benchmarking circuits are presented and compared with the Feng Shui's results in［14］. Solution Qualifies are almost the same as the Feng Shui's results.

• Journal of the Korean Society of School Health
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• v.26 no.3
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• pp.133-143
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• 2013

Purpose: The purpose of this study is to provide basic data for a more reasonable health teacher placement policy sending teachers to more appropriate sites, by analyzing the change process of the health teacher placement standards and the problems caused by an unreasonable placement policy. Methods: This study mainly analyzed relevant research data and existing studies focusing on a literature analysis. Results: To date, the placement policy for health teachers has changed, going through expansion, reduction, and retrogression, since its establishment. The standard, placing health teachers only in elementary schools with more than 18 classes, was created in 1952. Despite the expansion of the role of health teachers and the revision of the school health law in 2007, this standard has been applied to date without modification. In the meantime, there have been many problems caused by inappropriate placement of health teachers. It was difficult for health teachers in large schools to carry out proper health education; and, in many schools, passive health management, such as first aid, health tests, and student health management, was mainly executed rather than active health management. Students in small schools were not even given an opportunity to receive health education and health management owing to the absence of health teachers. Also, compared to teachers teaching other subjects, health teachers have had very unfair placement standards. Conclusion: The placement policy for health teachers, which has been applied to the present, has never reflected social change, the increase of student health issues, and the demand from the school area. Although the role of health teachers expanded with the execution of health education, the current placement standards for health teachers are very unreasonable. Accordingly, it is necessary to review the health teacher placement policy in a reasonable manner and to revise the standards considering the reality.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.38 no.11
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• pp.922-933
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• 1989

This paper deals with an indirect pole placement adaptive controller design problem for discrete-time plants with arbitrary zeros in the presence of unmodeled dynamics and/or disturbances. The plant and controller parameters are estimated by separate estimators. The nonlinear feedback is introduced so that the estimated plant has as high degree of controllability as possible. The nonlinear feedback will be used in a finite time, after which the control algorithm becomes a standard pole placement one.

• Journal of Advanced Navigation Technology
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• v.7 no.2
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• pp.206-210
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• 2003

In this paper, we design standard cell libraries using the 0.18um deep submircom CMOS process, and port them into a P&R (Placement and Routing) CAD tool. A simple test chip has been designed in order to verify the functionalities of the 0.18um standard cell libraries whose technical process was provided by Anam semiconductor. Through these experiments, we have found that the new 0.18um CMOS process can be successfully applied to automatic digital system design.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.7
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• pp.839-846
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• 1999

This paper presents an efficient algorithm for determining the location, size and number of capacitors in unbalanced radial distribution system. The objective function formulated consists of two terms: cost for energy loss and cost related to capacitor purchase and capacitor installation. The cost function associated with capacitor placement is considered as step function due to banks of standard discrete capacities. Genetic algorithms(GA) are used to obtain the population is derived. The strings in each population consist of the bus number index and size of capacitors to be installed. In order to determine the number of capacitor placement, the length mutation operator is used. Its efficiency is proved through the application in unbalanced radial distribution systems made of 10 buses with 9 distribution lines and 25 buses with 24 distribution lines.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.34-43
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• 2002

This paper deals with a standard cell placement which is based on a quadratic programming. This paper proposes a new additional force to reduce the cell overlap and to get a uniform distribution of cells. The additional force is not concerned with interconnections between cells, but it is determined by the density of a placement area. In this paper, we modelled that the new additional force is a force which is caused by the dummy fixed cell. And it is used for the global placement. Proposed placement method is compared with TimberWolf v7.0 and Itools vl.4. Proposed placer achieved 7.5% average reduction in wirelength in non timing driven mode, 5.0% average reduction in wlrelength in timing driven mode compared to TimberWolf v7.0. And we got a comparable result to Itools vl.4.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.10
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• pp.1984-1991
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• 2011

Among ground impedance measurement methods, the fall-of-potential method is the most thorough and reliable method. In the fall-of-potential method, ground electrode and auxiliary probes are placed in a straight line, and then, auxiliary potential probe is moved away from the ground electrode. The point at which plotted resistance curve flattens out is taken as right position of auxiliary potential probe. However, in some cases, it is hard to place ground electrode and auxiliary probes in a straight line. Therefore, we provided alternative placement method in this research. The method can be easily applicable to placing auxiliary probes. Also, this paper analyzed and compared ground impedance measurement standards of large grounding systems. Based on the analysis, practical measurement method using an earth tester was proposed. The proposed methods presented in this paper will be useful when determining locations of auxiliary probes in alternative positions, and the methods can be applied practically and easily.