• Journal of KIISE
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• v.42 no.3
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• pp.379-389
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• 2015

With the advent of non-volatile memories such as Phase Change Memory (PCM or PRAM) and Magneto Resistive RAM (MRAM), active studies have been carried out on how to replace Dynamic Random-Access Memory (DRAM) with PRAM. In this paper, we study both endurance and performance issues of existing join algorithms that are based on PRAM-based computer systems and have been widely used until now: Block Nested Loop Join, Sort-Merge Join, Grace Hash Join, and Hybrid Hash Join. Our experimental results show that the existing join algorithms need to be redesigned to improve both the endurance and performance of PRAMs. To the best of our knowledge, this is the first research to scientifically study the results of the four join algorithms running on PRAM-based systems. In this work, our main contribution is the modeling and implementation of a PRAM-based simulator for a comparative study of the existing join algorithms.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.250-250
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• 2007

• 한국전자현미경학회:학술대회논문집
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• 2005.05a
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• pp.130-131
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• 2005

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.476-484
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• 2015

Due to the recent advances in non-volatile memory technologies such as PCM, a new memory hierarchy of computer systems is expected to appear. In this paper, we explore the performance of PCM-based swap systems and discuss how this system can be managed efficiently. Specifically, we introduce three management techniques. First, we show that the page fault handling time can be reduced by attaching PCM on DIMM slots, thereby eliminating the software stack overhead of block I/O and the context switch time. Second, we show that it is effective to reduce the page size and turn off the read-ahead option under the PCM swap system where the page fault handling time is sufficiently small. Third, we show that the performance is not degraded even with a small DRAM memory under a PCM swap device; this leads to the reduction of DRAM's energy consumption significantly compared to HDD-based swap systems. We expect that the result of this paper will lead to the transition of the legacy swap system structure of "large memory - slow swap" to a new paradigm of "small memory - fast swap."

• Proceedings of the Korea Crystallographic Association Conference
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• 2007.11a
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• pp.49-49
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• 2007

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.60-61
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• 2007

In this paper, the p-channel poly Si thin-film transistors (Poly-Si TFT's) using formed by solid phase crystallization (SPC) on glass substrate were fabricated. And we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's to indicate non-volatile memory (NVM) effect. Poly-Si TFT is investigated by measuring the electrical properties of poly-Si films, such as I-V characteristics, on/off current ratio. NVM characteristics is showed by measuring the threshold voltage change of TFT through I-V characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.377-380
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• 2004

The phase transition between amorphous and crystalline states in chalcogenide semiconductor films can controlled by electric pulses or pulsed laser beam; hence some chalcogenide semiconductor films can be applied to electrically write/erase nonvolatile memory devices, where the low conductive amorphous state and the high conductive crystalline state are assigned to binary states. GeSbTe(GST), AsSbTe(AST), SeSbTe(SST) used to phase change materials by appling electrical pulses. Thickness of ternary chalcogenide thin films have about 100nm. Upper and lower electrode were made of Al. It is compared with I-V characteristics after impress the variable pulses.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.132-133
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• 2006

PRAM (phase-change random access memory)은 전류 펄스 인가에 따른 기록매질의 비정질-결정질 간 상변화와 그에 동반되는 저항변화를 이용하는 차세대 비휘발성 메모리 소자로서 연구되어지고 있다. 본 논문에서는 $(GeTe)_x(Sb_2Te_3)$ pseudobinary line을 따르는 조성(x=0.5, 1, 2, 8)의 벌크 및 박막시료를 제작하고 원자-스케일의 구조적 상변화를 분석하였다. 열증착을 이용하여 Si 기판위에 200nm 두께의 박막을 형성, 질소분위기 하에서 100-450도 범위에서 열처리 하였다. XRD를 통해 열처리 온도에 따른 구조적 분석을 실시하였다. x=8의 조성을 제외한 전체 박막에 대해 열처리 온도 증가에 따라 fcc와 hexagonal 구조가 순차적으로 나타났으며 일부에서는 혼종의 상구조를 보였다. 특히, $Ge_2Sb_2Te_5$ 박막에 대하여 EXAFS (extended x-ray absorption fine structure) 및 XPS를 이용하여 상변화의 원자-스케일 구조분석을 하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.3
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• pp.133-138
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• 2017

We evaluated the structural, electrical and optical properties of tungsten (W)-doped $Ge_8Sb_2Te_{11}$ thin films. In a previous work, GeSbTe alloys were doped with different materials in an attempt to improve thermal stability. 200 mm thick $Ge_8Sb_2Te_{11}$ and W-doped $Ge_8Sb_2Te_{11}$ films were deposited on p-type Si (100) and glass substrates using a magnetron co-sputtering system at room temperature. The fabricated films were annealed in a furnace in the $0{\sim}400^{\circ}C$ temperature range. The structural properties were analyzed using X-ray diffraction (X'pert PRO, Phillips). The results showed increased crystallization temperature ($T_c$) leading to thermal stability in the amorphous state. The optical properties were analyzed using an UV-Vis-IR spectrophotometer (Shimadzu, U-3501, range : 300~3,000 nm). The results showed an increase in the crystalline material optical energy band gap ($E_{op}$) and an increase in the $E_{op}$ difference (${\Delta}E_{op}$). This is a good effect to reduce memory device noise. The electrical properties were analyzed using a 4-point probe (CNT-series). This showed increased sheet resistance ($R_s$), which reduces programming current in the memory device.

• Journal of KIISE
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• v.42 no.8
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• pp.972-978
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• 2015

Non-volatile memory (NVM) supports both byte addressability and non-volatility. These characteristics make it feasible for NVM to be employed at any layer of the memory hierarchy such as cache, memory and disk. An interesting characteristic of NVM is that, even though it supports non-volatility, its retention capability is limited. Furthermore NVM has tradeoff between its retention capability and write latency. In this paper, we propose a novel NVM-based file cache management scheme that makes use of the limited retention capability to improve the cache performance. Experimental results with real-workloads show that our scheme can reduce access latency by up to 31% (24.4% average) compared with the conventional LRU based cache management scheme.