• Title/Summary/Keyword: Phase margin

Search Result 267, Processing Time 0.031 seconds

Analysis and Design of the Interface Inductor and the DC Side Capacitor in a STATCOM with Phase and Amplitude Control Considering the Stability of the System

  • Zhao, Guopeng;Han, Minxiao;Liu, Jinjun
    • Journal of Power Electronics
    • /
    • 제12권1호
    • /
    • pp.193-200
    • /
    • 2012
  • Previous publications regarding the design and specifications of the interface inductor and the DC side capacitor for a STATCOM usually deal with the interface inductor and the DC side capacitor only. They seldom pay attention to the influences of the interface inductor and capacitor on the performance of a STATCOM system. In this paper a detailed analysis of influence of the interface inductor and the DC side capacitor on a STATCOM system and the corresponding design considerations is presented. Phase and amplitude control is considered as the control strategy for the STATCOM. First, a model of a STATCOM system is carried out. Second, through frequency domain methods, such as transfer functions and Bode plots, the influence of the interface inductor and the DC side capacitor on the stability and filtering characteristics of the STATCOM are extensively investigated. Third, according to this analysis, the design considerations based on the phase margin for the interface inductor and the DC side capacitor are discussed, which leads to parameters that are different from those of the traditional design.

Verification for the design limit margin of the power device using the HALT reliability test

  • Chang, YuShin
    • 한국컴퓨터정보학회논문지
    • /
    • 제23권11호
    • /
    • pp.67-74
    • /
    • 2018
  • The verification for the design limit margin of the power device for the information communication and surveillance systems using HALT(Highly Accelerated Life Test) reliability test is described. The HALT reliability test performs with a step stress method which change condition until the marginal step in a design and development phase. The HALT test methods are the low temperature(cold) step stress test, the high temperature(hot) step stress test, the thermal shock cyclic stess test, and the high temperature destruct limit(hot DL) step stress test. The power device is checked the operating performance during the test. In this paper, the HALT was performed to find out the design limit margin of the power device.

단일 입출력 시스템에 대한 IMC-PID의 새로운 최적 동조법 (New Optimal Tuning Method of IMC-PID for SI/SO Systems)

  • 김창현;임동규
    • 한국정보통신학회:학술대회논문집
    • /
    • 한국해양정보통신학회 2008년도 춘계종합학술대회 A
    • /
    • pp.213-217
    • /
    • 2008
  • 본 논문에서는 표준 IMC-PID 제어기에 시스템 식별상의 위상 조절 인자를 설계 변수로 추가함으로 새로운 IMC-PID 제어기 설계 방법을 제안한다. 제안된 제어기의 동조법으로 해석적으로 구해진 주파수 영역 특성을 통해 주파수 영역 성능을 보장하도록 하는 설계 변수의 구속 조건 하에서 시간영역의 적분 오차 지표를 가격함수로 최소화하는 최적 해를 얻는다. 이 제안된 동조법은 다양한 설계 사양을 동시에 고려하도록 하여 기존의 IMC-PID의 단일 설계 변수 동조가 갖는 비유연성 문제를 개선하였다. 사례 연구에서 기존의 동조법들과의 성능 비교를 통해 그 유용성을 검토했다.

  • PDF

IMC-PID 제어기의 최적 동조 (An Optimum Tuning for IMC-PID Controller)

  • 박종수;임동균;서병설
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
    • /
    • pp.167-169
    • /
    • 2005
  • This paper proposes an optimum tuning which improves the tuning effect of IMC-PID and guarantees the performance and robustness of controller system by considering gain margin, phase margin, sensitivity functions and integral square error(ISE) for IMC-PID controller.

  • PDF

Robust한 단 입출력 PI 및 PID 예측 제어기 설계 (Robust design of SISO digital PI and PID predictor controllers)

  • 전병균;전기준
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 1986년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 17-18 Oct. 1986
    • /
    • pp.362-366
    • /
    • 1986
  • Using simple linear prediction algorithm a design procedure of robust PI and PID controllers for SISO system, usually called 'PID predictor controllers, is developed. The design procedure is able to properly adjust gain margin and phase margin and control coefficients are selected in frequency domain. The performance of the PID predictor controller is superior to that of the normal PID controller in terms of robustness in design and disturbance rejection.

  • PDF

IMC-PID 제어기의 최적 동조 (An Optimum Tuning for IMC-PID Controller)

  • 박종수;임동균;서병설
    • 한국산학기술학회:학술대회논문집
    • /
    • 한국산학기술학회 2006년도 춘계학술발표논문집
    • /
    • pp.344-347
    • /
    • 2006
  • This paper proposes an optimum tuning which improves the tuning effect of IMC-PID and guarantees the performance and robustness of controller system by considering gain margin, phase margin, sensitivity functions and integral square error(ISE) for IMC-PID controller.

  • PDF

출력 시간 지연 시스템의 루우프 복구특성 (LTR properties for output-delayed systems)

  • 이상정;홍석민
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
    • /
    • pp.161-167
    • /
    • 1993
  • This paper presents robustness properties of the Kalman Filter ad the associated LQG/LTR method for linear time-invariant systems having delays in both the state and output. A circle condition relating to the return difference matrix associated with the Kalman filter is derived. Using this circle condition, it is shown that the Kalman filter guarantees(1/2, .inf.) gain margin and .+-.60.deg. phase margin, which are the same as those for nondelay systems. However, it is shown that, even for minimum phase plants, the LQG/LTR method can not recover the target loop transfer function. Instead, an upper bound on the recovery error is obtained using an upper bound of the solution of the Kalman filter Riccati equations. Finally, some dual properties between output-delated system and input-delayed systems are exploited.

  • PDF

Hot carrier 현상에 의한 CMOS 차동 증폭기의 성능 저하 (The performance degradation of CMOS differential amplifiers due to hot carrier effects)

  • 박현진;유종근;정운달;박종태
    • 전자공학회논문지D
    • /
    • 제34D권7호
    • /
    • pp.23-29
    • /
    • 1997
  • The performance degradation of CMOS differential amplifiers due to hot carrier effect has been measured and analyzed. Two-state CMOS amplifiers whose input transistors are PMOSFETs were designed and fabriacted using the ISRC CMOS 1.5.mu.m process. It was observed after the amplifier was hot-carrier stressed that the small-signal voltage gain and the input offset voltage increased and the phase margin decreased. The performance variation results from the increase of the transconductances and gate capacitances of the PMOSFETs used as input transistors in the differential input stage and the output stage and also resulted from the decrease of their output conductances. After long-term stress, the amplifier became unstable. The reason might be that its phase margin was reduced due to hot carrier effect.

  • PDF

경관조명용 플라이백 컨버터의 안정화 설계 (The Stabilized Flyback Converter Design for Lighting Control System)

  • 임성진;김창선;유진호;천승환
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2010년도 하계학술대회 논문집
    • /
    • pp.9-10
    • /
    • 2010
  • The lighting control power circuits should be designed in stable region according to the environment. A stable circuit is analyzed using ac equivalent circuits. The flyback converter with wide input voltage ranges is suitable for lighting control system. It is designed optimally for stability. The specifications are that the input voltage is 90V-230V, the output power is 12V/2.5A. The stability analysis is established using PSM(Phase Sensitive Multimeter) in experiment. As a result, it is confirmed that the gain margin and the phase margin are in stable area. The validity of the experimental measurement is verified.

  • PDF