• ETRI Journal
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• v.35 no.6
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• pp.1152-1155
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• 2013

A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.156-160
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• 2011

This paper describes the design and implementation of a System-on-a-Chip (SoC) for pattern recognition to use in embedded applications. The target Soc consists of LEON2 core, AMBA/APB bus-systems and custom-designed accelerators for Gaussian Pyramid construction, lighting compensation and histogram equalization. A new FPGA-based prototyping platform is implemented and used for design and verification of the target SoC. To ensure that the implemented SoC satisfies the required performances, a pattern recognition application is performed.

• Proceedings of the KIEE Conference
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• 2004.05a
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• pp.153-155
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• 2004

In this paper, we design the memory tester chip playing an important role in the memory tester as central parts. Memory tester has the sixteen inner instructions to control the test sequence and the address and data signals to DUT. These instructions are saved in memory with each block such as sequencer and pattern generator. Sequencer controls the test sequence according to instructions saved in the memory. And Pattern generator generates the address and data signals according to instructions saved in the memory, too. We can use these chips for various functional test of memory.

• Elastomers and Composites
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• v.58 no.2
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• pp.87-94
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• 2023

Abrasion tests of an SBR compound were conducted using four different types of abrasion testers (cut and chip, Lambourn, DIN, and LAT100). The abrasion test results were analyzed in terms of size distributions and morphologies of the wear particles. Most wear particles were larger than 1000 ㎛. The wear particle size distributions tended to decrease as the particle size decreased. Except for the Lambourn abrasion test, the wear particles smaller than 212 ㎛ were rarely generated by the other three abrasion tests, implying that small wear particles were produced through friction by introducing talc powder. Shapes of the wear particles varied depending on the abrasion testers. The wear particles generated from the Lambourn abrasion tester had stick-like shapes. The cut and chip abrasion test showed a clear abrasion pattern, but the DIN abrasion test did not show any specific abrasion pattern. The Lambourn and LAT100 abrasion tests showed irregular abrasion patterns.

• 한국생물공학회:학술대회논문집
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• 2003.10a
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• pp.391-391
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• 2003

• Proceedings of the KWS Conference
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• 2001.10a
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• pp.162-164
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• 2001

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.633-640
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• 2002

In this paper, the small chip meander antenna for dual-frequency operation is presented. The proposed chip meander antennas was fabricated by the ceramic chip using LTCC-MLC process. It is a novel compact dual-frequency design using a meandered patch that achieves more degrees of freedom for adjusting dual-frequency operation and the size reduction with narrow frequency ratio. And it is proposed that the 3D structure for additional size reduction of the meander antenna. The size reduction of the 3D meander antenna is as large as 50 % as compared to the design for dual-frequency operation not using 3D structure. It is observed that the principle of dual-frequency operation through current distribution, return loss and radiation pattern.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.215-221
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• 2016

In this thesis we introduce a large quantity of input interface system using a low cost single chip microcontroller which is consists of walking board with 1600 switches, RS485 communication for switch data communication and PC application software for walking pattern analysis. When a pedestrian walks on the walking board, the pattern analysis of foot pressed switches can be utilized on diverse divisions of sports and industry such as walking physical therapy, dancing, a large quantity of sensors interface system, etc.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.717-722
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• 2004

A design was done, and all characteristic of photodetectr of the web pattern type which a standard process of the Bipolar which Si PIN structure was used in this paper, and was used for the current amplifier design was used, and high-speed, was used as receiving optcal area of high altitude, and the module which had a low dark current characteristic was implemented with one chip with a base. Important area decreases an area of Ie at the time of this in order to consider an electrical characteristic and economy than the existing receiving IC, and performance of a product and confidence are got done in incense. First of all, the receiving IC which a spec, pattern of a wafer to he satisfied with the following electrical optical characteristic that produced receiving IC of 5V and structure are determined, and did one-chip is made. On the other hand, the time when AR layer of double is $Si_{3}N_{4}/SiO_{2}=1500/1800$ has an optical reflectivity of less than $10{\%}$ on an incidence optical wavelength of 660 ,and, in case of photo detector which reverse voltage made with 1.8V runs in 1.65V, an error about a change of thickness is very the thickness that can be improved surely. And, as for the optical current characteristic, about 5 times increases had the optical current with 274nA in 55nA when Pc was -27dBm. A BJT process is used, and receiving IC running electricity suitable for low voltage and an optical characteristic in minimum 1.8V with a base with two phases is made with one chip. IC of low voltage operates in 1.8V and 3.0V at the same time, and optical link receiving IC is going to be implemented

• Journal of the Microelectronics and Packaging Society
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• v.16 no.2
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• pp.11-19
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• 2009

Thermo-mechanical behaviors of wire-bond plastic ball grid array (WB-PBGA) package assemblies are characterized by high-sensitivity moire interferometry. Using the real-time moire setup, fringe patterns are recorded and analyzed for several temperatures. Experiments are conducted for three types of WB-PBGA package that have full grid pattern and perimeter pattern with/without central connections. Bending deformations of the assemblies and average strains of the solder balls are investigated, with an emphasis on the effect of solder interconnection grid patterns, Thermal strain distributions and the location of the critical solder ball in package assemblies are quite different with the form of solder ball grid pattern. For the WB-PBGA-PC, The largest of effective strain occurred in the inner solder ball of perimeter closest to the chip solder balls. The critical solder ball is located at the edge of the chip for the WB-PBGA-FG, at the most outer solder ball of central connections for the WB-PBGA-P/C, and at the inner solder ball closest to the chip for the WB-PBGA-P.