• 제목/요약/키워드: Parity

검색결과 1,098건 처리시간 0.024초

LDPC 코드를 적용한 광 디스크 시스템의 에러 정정 성능 및 기록 용량 분석 (Analysis of error correction capability and recording density of an optical disc system with LDPC code)

  • 김기현;김현정;이윤우
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2003년도 신호처리소사이어티 추계학술대회 논문집
    • /
    • pp.537-540
    • /
    • 2003
  • In this paper, we evaluated error correction performance and recording density of an optical disc system. The performance of Low-Density Parity Check code (LDPC) is compared to the HD-DVD (BD) ECC. The recording density of optical disc can be increased by reducing the redundancy of the user data. Moreover, since the correction capability of LDPC with decreased redundancy is better than that of BD, the recording density can also be increased by reducing the mark length of the data on the disc surface.

  • PDF

A Simple Efficient Stopping Criterion for Turbo Decoder

  • Kim, Young-Sup;Ra, Sung-Woong
    • ETRI Journal
    • /
    • 제28권6호
    • /
    • pp.790-792
    • /
    • 2006
  • The performance of a turbo decoder depends strongly on the number of iterations in its decoding process. It is necessary to stop the decoding process at an appropriate moment to alleviate the serious burden, in terms of both the computational speed and latency, part of which is associated with too many iterations. In this letter, we introduce a criterion for finding the opportune moment to stop the decoding process, called a hard decision aided criterion based on bit interleaved parity, which is known to have much simpler hardware logic, compared with other schemes, and does not lead to any significant performance degradation.

  • PDF

다층신경망을 이용한 디지털회로의 효율적인 결함진단 (An Efficient Fault-diagnosis of Digital Circuits Using Multilayer Neural Networks)

  • 조용현;박용수
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 1999년도 하계종합학술대회 논문집
    • /
    • pp.1033-1036
    • /
    • 1999
  • This paper proposes an efficient fault diagnosis for digital circuits using multilayer neural networks. The efficient learning algorithm is also proposed for the multilayer neural network, which is combined the steepest descent for high-speed optimization and the dynamic tunneling for global optimization. The fault-diagnosis system using the multilayer neural network of the proposed algorithm has been applied to the parity generator circuit. The simulation results shows that the proposed system is higher convergence speed and rate, in comparision with system using the backpropagation algorithm based on the gradient descent.

  • PDF

자본주의(資本主義) 정신(精神)과 농지개혁(農地改革)에 관(關)한 연구(硏究) (A Study on Land Reform under Capitalistic Spirit)

  • 김재홍
    • 농업과학연구
    • /
    • 제9권1호
    • /
    • pp.387-395
    • /
    • 1982
  • Land reform was performed in most under-developed countries after liberation from colonialism. In Griffin's thesis, the objectives of the land reform were classified in to three categories based on their ideology. Under capitalist ideology, emphasis was placed on the property ownership, so there has been existed large farms and various tenancy systems. But in this study the characteristics of capitalism was defined as deligence and thrift, and parity exchange. Land reform, tenants must have their own land, is the basic solution to support these characteristics.

  • PDF

Evaluation of soft iterative decoder with run length limited code in optical storage system

  • 김기현;한성휴;심재성;박현수;박인식
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
    • /
    • pp.99-102
    • /
    • 2002
  • In this work, we evaluated the performance of soft iterative decoder with soft block decoder in optical storage system. Because optical storage system requires run- length limited code in general, adaptation of the soft decoders such as turbo code or LDPC(low density parity check code) is difficult without soft block decoders. The performance of the overall optical detection system is evaluated and the simplified channel detection is also proposed.

  • PDF

캐쉬를 이용한 RAID5 상에서 작은 쓰기 문제의 성능 분석 (Performance Analysis of the Small Write Problem on the Cached RAID5)

  • 최황규;서주하;이승택
    • 산업기술연구
    • /
    • 제15권
    • /
    • pp.103-111
    • /
    • 1995
  • In this paper we evaluate the performance of the cached RAID5 which uses the parity cache and the data cache to overcome the small write problem. From the result of the simulation study we show that the cached RAID5 provides performance improvement with reasonable cache size.

  • PDF

REPEATED LOW-DENSITY BURST ERROR DETECTING CODES

  • Dass, Bal Kishan;Verma, Rashmi
    • 대한수학회지
    • /
    • 제48권3호
    • /
    • pp.475-486
    • /
    • 2011
  • The paper deals with repeated low-density burst error detecting codes with a specied weight or less. Linear codes capable of detecting such errors have been studied. Further codes capable of correcting and simultaneously detecting such errors have also been dealt with. The paper obtains lower and upper bounds on the number of parity-check digits required for such codes. An example of such a code has also been provided.

분산 스페어 디스크를 이용한 RAID 패리티 디클러스터링 방법 (RAID Parity Declustering using Distributed sparing)

  • 백운천;장태무
    • 한국정보과학회:학술대회논문집
    • /
    • 한국정보과학회 1999년도 가을 학술발표논문집 Vol.26 No.2 (3)
    • /
    • pp.27-29
    • /
    • 1999
  • RAID는 고병렬성과 고가용성을 목표로 제안된 대용량 저장 수단이다. 패리티 디클러스터링을 이용한 RAID는 특히 고장이 발생한 경우에도 성능의 저하를 최소화하여 고가용성을 갖는 저장장치를 구축할 수 있는 기법이다. 본 논문에서는 이러한 패리티 디클러스터링을 사용한 RAID에 스페어 유닛을 분산시킨 구성을 제안하고, 특히 이러한 분산 스페어링이 고장이 없는 정상 상태에서도 성능 개선에 유용함을 보인다. 본 논문의 실험 결과는 시뮬레이션 방식으로 입증하였으며, 전반적으로 정상상태의 성능을 5-15% 정도 높일 수 있음을 알 수 있다.

  • PDF

A Syndrome-distribution decoding MOLS L$_{p}$ codes

  • Hahn, S.;Kim, D.G.;Kim, Y.S.
    • 한국수학교육학회지시리즈E:수학교육논문집
    • /
    • 제6권
    • /
    • pp.371-381
    • /
    • 1997
  • Let p be an odd prime number. We introduce simple and useful decoding algorithm for orthogonal Latin square codes of order p. Let H be the parity check matrix of orthogonal Latin square code. For any x ${\in}$ GF(p)$^{n}$, we call xH$^{T}$ the syndrome of x. This method is based on the syndrome decoding for linear codes. In L$_{p}$, we need to find the first and the second coordinates of codeword in order to correct the errored received vector.

  • PDF

(88,64)SBEC-DBED부호의 고속병렬 CODEC설계 (The Parallel High Speed CODEC Design of (88.64)SBEC-DBED code)

  • 우형철;김재문;이만영
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
    • /
    • pp.176-178
    • /
    • 1988
  • In this paper, techniques of constructing parity check matrix of SBEC-DBED codes will be presented to improve reliability of muliti-bit-per-chip type memory systems. And the high speed parallel CODEC of (88.64)SBEC-DBED code which is applicable to real system will be designed.

  • PDF