• Journal of Power Electronics
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• 제14권6호
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• pp.1130-1138
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• 2014

This study analyzes a ladder multilevel converter (double ladder topology) with the use of a new averaging modeling technique. This technique introduces an analytical method to compute for the switching losses and is used to conduct an in-depth analysis of the influence of the switching frequency and parasitic resistance of components on converter efficiency. The obtained results enable the selection of switches and switching frequency to minimize losses. Moreover, simulation results and experimental measurements validate the analytical calculations.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1306-1308
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• 2001

Hardware and software studies strongly indicate the feasibility of commercially producing a low cost, user-friendly photovoltaic cell curve tracer. The instrument will be used in conjuntion with an IBM compatible PC. The system will show not only the parameters; Voc, Isc, FF, Iop, Vop, that the conventional VI tracer shows but also the internal parasitic resistance and the detail parameters.

• 한국전기전자재료학회논문지
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• 제23권3호
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• pp.183-189
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• 2010

In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

• 전자공학회논문지B
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• 제32B권5호
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• pp.710-719
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• 1995

In LD driver with HBT's. the speed characteristics of HBT's are deteriorated very much mainly due to the source resistance(Rs) of the signal applied to the LD driving HBT. We improved the bandwidth of LD driver by 2-5GHz with modifications of EF buffer. Because the modified buffers are composed of EF structure, their bandwidths are decreased rapidly as Rs is increased. When Rs is large these buffers decrease the bandwidth of the LD driver rather than increase it. To solve this problem, we propose a new buffer structure which contaings new charging and discharging path for the parasitic collector capacitance of the HBT. For Rs>100${\Omega}$, it shows superior characteristics of improving bandwidth to the EF buffers. It also shows good gain characteristics.

• 전자공학회논문지A
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• 제32A권9호
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• pp.98-105
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• 1995

Recent microwave IC's reach to the extent of high operating frequencies at which bonding wires limit their performance as dominant parasitic components. Double bonding wires separated by an internal angle have been firstly characterized using the Method of Moments with the incorporation of the ohmic resistance calculated by the phenomenological loss equivalence method. For a 30$^{\circ}$ internal angle, the calculated total reactance is 45% less than that of a single bonding wire due to the negative mutual coupling effect. The radiation effect has been observed decreasing the mutual inductance, whereas for parallel bonding wires it greatly increases the mutual inductance. This calculation results can be widely used for designing and packaging of high frequency and high density MMIC's and OEIC's.

• Parasites, Hosts and Diseases
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• 제48권4호
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• pp.281-284
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• 2010

Due to the possible emergence of resistance and safety concerns on certain treatments, development of new drugs against parasites is essential for the effective control and subsequent eradication of parasitic infections. Several drug targets have been identified which are either genes or proteins essential for the parasite survival and distinct from the hosts. These include the phosphagen kinases (PKs) which are enzymes that playa key role in maintenance of homeostasis in cells exhibiting high or variable rates of energy turnover by catalizing the reversible transfer of a phosphate between ATP and naturally occurring guanidine compounds. PKs have been identified in a number of important human and animal parasites and were also shown to be significant in survival and adaptation to stress conditions. The potential of parasite PKs as novel chemotherapeutic targets remains to be explored.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.356-359
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• 2006

This paper presented the power losses comparison results with the Active clamp Forward, the Asymmetrical half bridge and the Two transistor forward converters. To estimate for conduction losses in the converters, the steady state analysis regard to parasitic resistance and current effective values for main parts of converters was derived. In addition, the theoretical efficiency for the converters with input voltage 400V, output voltage 12V and maximum power 480W was discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 B
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• pp.939-940
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• 2006

An integrated inductor using the low-temperature co-fired ceramics(LTCC ) technology for low-power electronics was fabricated. In the inductor NiZn ferrite sheet(${\mu}_r=230$), was embedded to increase inductance. The inductor has Ag spiral coil with 14 turns($7turns{\times}2layers$), a dimension of 0.6mm in width, 10um in thickness, and 0.15mm pitch. To evaluate the inductance, including the parasitic resistance, the fabricated inductor was calculated and measured. It was confirmed that calculated values were very close to the measured values. Finally as an application of the LTCC integrated inductor to low power electronic circuits, a LTCC buck DC/DC converter with 1W output power and up to 0.5MHz switching frequency using the inductor fabricated was develop.

• 대한전자공학회논문지
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• 제27권1호
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• pp.74-80
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• 1990

The transconductance of short channel LDD MOSFETs in the saturation region (high Vd)has shown different characteristics from that of conventional device. The transconductance in saturation regime of short channel LDD MOSFETs is reduced from maximum value at higher gate voltage. This decline is analyzed as the velocity saturation effects of carrier at LDD region but accurate analytical expressions for the drain current Idsat and the transconductance Gmsat in the saturation regime are still not in existence. Recently the drain current dependence of parasitic source resistance Rs has been modeled from the velocity saturation of carriers in LDD region. In this study, we approximate that Rmsat that Rs is linearly dependent on the applied gate voltage. Analytical expressions for Idsat and Gmsat obtained from this approximation show the same general behavior as experimental results of short channel LDD NMOSFETs.

• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.82-87
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• 2020

The comprehensive and physics-based compact noise models for advanced CMOS devices were presented. The models incorporate important physical effects in nanoscale MOSFETs, such as the low frequency correlation effect between the drain and the gate, the trap-related phenomena, and QM (quantum mechanical) effects in the inversion layer. The drain current noise model was improved by including the tunneling assisted-thermally activated process, the realistic trap distribution, the parasitic resistance, and mobility degradation. The expression of correlation coefficient was analytically described, enabling the overall noise performance to be evaluated. With the consideration of QM effects, the comprehensive low frequency noise performance was simulated over the entire bias range.