• Journal of the Institute of Convergence Signal Processing
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• v.7 no.3
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• pp.136-142
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• 2006

Existing buffer management schemes for shared-memory output queueing switches can be classified into two types: In the first type, some constant amount of memory space is guaranteed to each virtual queue using static queue thresholds. The static threshold method (ST) belongs to this type. On the other hand, the second type of approach tries to maximize the buffer utilization in 머 locating buffer memories. The complete sharing (CS) method is classified into this type. In the case of CS, it is very hard to protect regular traffic from mis-behaving traffic flows while in the case of ST the thresholds can not be adjusted according to varying traffic conditions. In this paper, we propose a new buffer management method called weighted dynamic thresholds (WDT) which can process packet flows based on loss priorities for quality-of-service (QoS) functionalities with fairly high memory utilization factors. We verified the performance of the proposed scheme through computer simulations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3B
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• pp.143-152
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• 2007

In order to provide new value-added services such as a policy-based routing and the quality of services in next generation network, the Internet routers need to classify packets into flows for different treatments, and it is called a packet classification. Since the packet classification should be performed in wire-speed for every packet incoming in several hundred giga-bits per second, the packet classification becomes a bottleneck in the Internet routers. Therefore, high speed packet classification algorithms are required. In this paper, we propose an efficient packet classification architecture based on a hierarchical binary search fee. The proposed architecture hierarchically connects the binary search tree which does not have empty nodes, and hence the proposed architecture reduces the memory requirement and improves the search performance.

• The KIPS Transactions:PartC
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• v.10C no.5
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• pp.641-646
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• 2003

Packet processing speed of routers as well as transmission speed of physical links gives a great effect on IP packet transfer rate in Internet. The router forwards a packet after determining the next hop to the packet's destination. IP address lookup is a main design issue for high performance routers. In this paper, we propose a partitioned compressed-trie for speeding-up IP address lookup algorithms based on tie data structure by exploiting path compression. In the ,proposed scheme, IP prefixes are divided into several compressed-tries and lookup is performed on only one partitioned compressed-trie. Memory access time for IP address lookup is lessen due to compression technique and memory required for maintaining partition does not increased.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.12
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• pp.2448-2457
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• 1994

CCITT recommendation X.25 and X.75 have been applied to the PSPDN environment for data communication of packet switching. They have also been used for packet switching in the ISDN exchanges since about the year 1980. This paper presents the throughput of the TDX-10 packet handler as simulating the performance based on memory management and flow control of the resource management algorithm designed originally.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.8B
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• pp.541-548
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• 2005

IP lookup and forwarding process becomes the bottleneck of packet transmission as IP traffic increases. Previous hardware-based IP address lookup schemes using an index-based table are not memory-efficient due to sparse distribution of the routing prefixes. In this paper, we propose memory-efficient hardware based IP lookup scheme called set-associative IP address lookup scheme, which provides the same IP lookup speed with much smaller memory requirement. In the proposed scheme, an NHA entry stores the prefix and next hop together. The IP lookup procedure compares a destination IP address with eight entries in a corresponding set simultaneously and finds the longest matched prefix. The memory requirement of the proposed scheme is about $42\%$ of that of Lin's scheme. Thus, the set-associative IP address lookup scheme is a memory-efficient hardware based IP address lookup scheme.

• Journal of KIISE:Information Networking
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• v.32 no.3
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• pp.427-432
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• 2005

Packet arrival rates in internet routers have been dramatically increased due to the advance of link technologies, and hence wire-speed packet processing in Internet routers becomes more challenging. As IP address lookup is one of the most essential functions for packet processing, algorithm and architectures for efficient IP address lookup have been widely studied. In this paper, we Propose an efficient I address lookup architecture which shows yeW good Performance in search speed while requires a single small-size memory The proposed architecture is based on multi-way tree structure which performs comparisons of multiple prefixes by one memory access. Performance evaluation results show that the proposed architecture requires a 280kByte SRAM to store about 40000 prefix samples and an address lookup is achieved by 5.9 memory accesses in average.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.1012-1015
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• 2008

The packet capturing becomes a bottleneck in the network intrusion detection and monitoring system as the network performance developing. Many approaches, zero copy, interrupt coalescing and NAPI which attempt to improve packet capturing performance of Linux, are inefficient. PF_RING is a new type of network socket that dramatically improves the packet capture speed, but not perfect. This paper proposes some solutions which can improve the memory utilization and save some data copy time based on the commodity network adapters rather than on the commercial network adapters.

• Journal of KIISE
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• v.42 no.8
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• pp.961-971
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• 2015

As a representative area-decomposed algorithm, an area-based quad-trie (AQT) has an issue of search performance. The search procedure must continue to follow the path to its end, due to the possibility of the higher priority-matching rule, even though a matching rule is encountered in a node. A leaf-pushing AQT improves the search performance of the AQT by making a single rule node exist in each search path. This paper proposes a new algorithm to further improve the search performance of the leaf-pushing AQT. The proposed algorithm implements a leaf-pushing AQT using a hash table and an on-chip Bloom filter. In the proposed algorithm, by sequentially querying the Bloom filter, the level of the rule node in the leaf-pushing AQT is identified first. After this procedure, the rule database, which is usually stored in an off-chip memory, is accessed. Simulation results show that packet classification can be performed through a single hash table access using a reasonable sized Bloom filter. The proposed algorithm is compared with existing algorithms in terms of the memory requirement and the search performance.

• ETRI Journal
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• v.32 no.2
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• pp.273-280
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• 2010

The overall channel capacity of a multihop wireless path drops progressively over each hop due to the cascading effect of noise and interference. Hence, without optimal rate adaptation, the video quality is expected to degrade significantly at any client located at a far-edge of an ad-hoc network. To overcome this limitation, decoding and forwarding (DF), which fully decodes codewords at each intermediate node, can be employed to provide the best video quality. However, complexity and memory usage for DF are significantly high. Consequently, we propose syndrome-based partial decoding (SPD). In the SPD framework an intermediate node partially decodes a codeword and relays the packet along with its syndromes if the packet is corrupted. We demonstrate the efficacy of the proposed scheme by simulations using actual 802.11b wireless traces. The trace-driven simulations show that the proposed SPD framework, which reduces the overall processing requirements of intermediate nodes, provides reasonably high goodput when compared to simple forwarding and less complexity and memory requirements when compared to DF.

• Journal of Information Technology Applications and Management
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• v.10 no.4
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• pp.159-168
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• 2003

This paper is concerned with the compression of EEG signals using wavelet-packet based techniques. EEG data compression is desirable for a number of reasons. Primarily it decreases for transmission time, archival storage space, and in portable systems, it decreases memory requirements or increases channels and bandwidth. Upon wavelet decomposition, inherent redundancies in the signal can be removed through thresholding to achieve data compression. We proposed the energy cumulative function for deciding of the threshold value and it works very innovative of EEG data.