• Journal of the Microelectronics and Packaging Society
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• v.6 no.2
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• pp.37-43
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• 1999

Modules of the system that requires large capacity and high-speed information processing are implemented in the form of MCM that allows high-speed data processing, high density circuit integration and widely applied to such fields as ATM, GPS and PCS. Hence we developed the ATM switching module that is consisted of three chips and 2.48 Gbps data throughput, in the form of 10 multi-layer by Cu/Photo-BCB and 491pin PBGA which size is $48 \times 48 \textrm {mm}^2$. hnologies required for the development of the MCM includes extracting parameters for designing the substrate/package through the interconnect characterization to implement the high-speed characteristics, thermal management at the high-density MCM, and the generation of the testability that is one of the most difficult issues for developing the MCM. For the development of the ATM Switching MCM, we extracted signaling delay, via characteristics and crosstalk parameters through the interconnect characterization on the MCM-D. For the thermal management of 15.6 Watt under the high-density structure, we carried out the thermal analysis. formed 1.108 thermal vias through the substrate, and performed heat-proofing processing for the entire package so that it can keep the temperature less than $85^{\circ}C$. Lastly, in order to ensure the testability, we verified the substrate through fine pitch probing and applied the Boundary Scan Test (BST) for verifying the complex packaging/assembling processes, through which we developed an efficient and cost-effective product.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.2
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• pp.81-88
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• 2021

In this paper, by applying LTCC substrate, the library of the passive elements is implemented. And it can be used in 24 GHz circuits. Depending on how to use it to the circuit, it is required large value by designing the basic structures such as electrode capacitor and spiral inductor. However they are not available in high-frequency domain, because their SRF(Self-Resonant Frequency) is lower than the frequency of 24-GHz. By solving the limit, this paper devised passive elements classified for the DC and the high-frequency domain. The basic structure is suitable for low frequency under 1~2 GHz like DC. The microstrip λ/8 length stub structure is proposed to use for high-frequency like 24-GHz. The open and short stub structure operate as a capacitor and inductor respectively, also they have their impedances. Through their impedances, we can extract the value with the impedance-related equation. In this paper, the proposed passive elements are produced with the permittivity 7.5 LTCC substrate, the basic structure which are available in the DC constituted a library of capacitance of 2.35 to 30.44 pF and inductance of 0.75 to 5.45 nH, measured respectively. The stub structure available in the high-frequency domain were built libraries of capacitance of 0.44 to 2.89 pF and inductance of 0.71 to 1.56 nH, calculated respectively. The measurements have proven how to diversify value, so libraries can be built more variously. It will be an alternative to the passive elements that it is possible to integrate with the operation circuit of radar module for the frequency 24-GHz.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.96-99
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• 2000

We presents a BGA(Ball Grid Array) package for RF circuit modules and extracted its electrical parameters. We constructed a BGA package of ITS(Intelligent Transportation System) RF module and examined electrical parameters with a HP5475A TDR(Time Domain Reflectometry) equipment and compared its electrical parasitic parameters with PCB RF circuits. With a BGA substrate of 3 $\times$ 3 input and output terminals, we have found that self capacitance of BGA solder ball is 68.6fF, self inductance 146pH, mutual capacitance 10.9fF and mutual inductance 16.9pH. S parameter measurement with a HP4396B Network Analyzer showed the resonance frequency of 1.55㎓ and the loss of 0.26dB. Thus, we may improve electrical performance when we use BGA package structures in the design of RF circuit modules.

• Korean Journal of Computational Design and Engineering
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• v.16 no.1
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• pp.52-60
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• 2011

In this research, we developed a design system for a compressor of an air conditioner using solid CAD system. The developed design system has some characteristics. First, the design system used a configuration design method, so a designer can design a compressor very quickly by using the constructed master libraries. Next, the system was developed to be used not only by engineers but also by salesmen. It is very easy for a user to use it, so a salesman can get a result very easily with the design system. And it has some design modules which give a considerable convenience to designers. Actually, designers are accustomed to the module based design. Then, it has calculation and analysis functions. Volume and mass of a part, and interference between parts are calculated by using the geometric calculation function of a solid CAD system. Also a packaging calculation was implemented to get the smallest space to package compressors for transportation and storing. An interface with a program to analyze the vibration of a compressor was developed in this design system. The design system is similar to CBD (Case-Based Design) system in the view of the whole design process.

• Korean Journal of Optics and Photonics
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• v.15 no.4
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• pp.349-354
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• 2004

As a transmitter sub-assembly in the XFP(10 Gb/s Small Form Factor Pluggable) transceiver module, a transmitter optical sub-assembly(TOSA) is designed, fabricated and characterized in view of electrical and thermal performances. For a low-cost and compact packaging TOSA, the bias-tee and the matching resistor are monolithically integrated on the AlN sub-mount and a newly designed coplanar waveguide is drawn in the TO-stem. All optoelectronic components packaged in the TOSA are modeled by the equivalent circuit, which helps to improve and characterize the TOSA performance. The fabricated TOSA shows the -3㏈ bandwidth as high as 11 GHz at an elevated temperature of 85$^{\circ}C$.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.9 no.4
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• pp.497-503
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• 1997

In the present study, the cooling package using the heat pipe has been developed to improve the thermal performance in the point of cooling characteristics of the electronic chip placed to the subrack being readily assembled and disassembled in ATM switching system. As the preliminary experiments, the cooling performances between a conventional way using a cooling fin and a proposed method applying the heat pipe are compared and analyzed. The cooling performance at a simulated electronic component packaging a heat pipe module is approximately achieved up to $5.0W/cm^2$ heat flux and the allowable temperature at the heated chip is sustained in the range within $70^{\circ}C$. From the results, it is confirmed that temperature oscillations are also settled by inserted wick in the evaporator section. From the user's viewpoint, the method to assemble and disassemble the heat pipe easily has been devised.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.23-29
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• 2017

The packaged optical fiber Bragg grating sensors which were networked by multiplexing the Bragg grating sensors with WDM technology were investigated in application for the structural health monitoring of the marine trestle structure transporting the ship. The optical fiber Bragg grating sensor was packaged in a cylindrical shape made of aluminum tubes. Furthermore, after the packaged optical fiber sensor was inserted in polymeric tube, the epoxy was filled inside the tube so that the sensor has resistance and durability against sea water. The packaged optical fiber sensor component was investigated under 0.2 MPa of hydraulic pressure and was found to be robust. The number and location of Bragg gratings attached at the trestle were determined where the trestle was subject to high displacement obtained by the finite element simulation. Strain of the part in the trestle being subjected to the maximum load was analyzed to be ${\sim}1000{\mu}{\varepsilon}$ and thus shift in Bragg wavelength of the sensor caused by the maximum load of the trestle was found to be ~1,200 pm. According to results of the finite element analysis, the Bragg wavelength spacings of the sensors were determined to have 3~5 nm without overlapping of grating wavelengths between sensors when the trestle was under loads and thus 50 of the grating sensors with each module consisting of 5 sensors could be networked within 150 nm optical window at 1550 nm wavelength of the Bragg wavelength interrogator. Shifts in Bragg wavelength of the 5 packaged optical fiber sensors attached at the mock trestle unit were well interrogated by the grating interrogator which used the optical fiber loop mirror, and the maximum strain rate was measured to be about $235.650{\mu}{\varepsilon}$. The modelling result of the sensor packaging and networking was in good agreements with experimental result each other.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.3
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• pp.67-72
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• 2015

A study on thermal properties for a single-layer metal and a 2-ply metal (clad metals) was investigated for the application of heat sink. For the single-layer metal, a stainless steel (STS) and an aluminum (Al) were selected. Also, a roll bonded clad metal with STS and Al was chosen for the 2-ply metal. The thermal conductivity of the sample was obtained from the thermal diffusivity measured by the light flash analysis (LFA), specific heat and density. Measured thermal property values were compared with the calculated values using the data from the references. For the single-layer metal, measured values for the thermal diffusivity and thermal conductivity were smaller than calculated values. Differences between measured and calculated values were about 6% and 18% for the STS and Al samples, respectively. For the clad metals, however, a large difference (55%) was observed. Here, a relatively small thermal conductivity measured by LFA was due to the existence of a interface between STS and Al in the clad metal. Such a interface reduces the moving velocity of free electrons and phonons in the clad metal. For the development of a high performance heat-issipation module with the multi-layer structure, the control of interface properties which determine thermal properties was confirmed to be important.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.47-52
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• 2017

This research scrutinizes the data retention characteristics of the MLC NAND Flash Memory instigated by the loss effect of trapped charge when the memory is in the state of program saturation. It is attributed to the threshold voltage saturation phenomenon which engenders an interruption to the linear increase of the voltage in the memory cell. This phenomenon is occasioned by the outflow of the trapped charge from the floating gate to the control gate, which has been programmed by the ISPP (Incremental Step Pulse Programming), via Inter-Poly Dielectric (IPD). This study stipulates the significant degradation of thermal retention characteristics of threshold voltage in the saturation region in contrast to the ones in the linear region. Thus the current study evaluates the data retention characteristics of voltage after the program with a repeated reading test in various measurement conditions. The loss effect of trapped charge is found in the IPD layer located between the floating gate and the control gate especially in the nitride layer of the IPD. After the thermal stress, the trapped charge is de-trapped and displays the impediment of the characteristic of reliability. To increase the threshold saturation voltage in the NAND Flash Memory, the storage ability of the charge in the floating gate must be enhanced with a well-thought-out designing of the module in the IPD layer.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.75-80
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• 2019

Silicon solar cells have been widely used as a most promising renewable energy source due to eco-friendliness and high efficiency. As modules of silicon solar cells are connected in series for a practical electricity generation, a large voltage of 500-1,500 V is applied to the modules inevitably. Potential-induced degradation (PID), a deterioration of the efficiency and maximum power output by the continuously applied high voltage between the module frames and solar cells, has been regarded as the major cause that reduces the lifetime of silicon solar cells. In particular, the migration of the $Na^+$ ions from the front glass into Si through the anti-reflection coating and the accumulation of $Na^+$ ions at stacking faults inside Si have been reported as the reason of PID. In this research, the thickness effect of $SiO_x$ layer that can block the migration of $Na^+$ ions on the reduction of PID is investigated as it is incorporated between anti-reflection coating and p-n junction in p-type PERC solar cells. From the measurement of shunt resistance, efficiency, and maximum power output after the continuous application of 1,000 V for 96 hours, it is revealed that the thickness of $SiO_x$ layer should be larger than 7-8 nm to reduce PID effectively.