• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.96-99
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• 2000

We presents a BGA(Ball Grid Array) package for RF circuit modules and extracted its electrical parameters. We constructed a BGA package of ITS(Intelligent Transportation System) RF module and examined electrical parameters with a HP5475A TDR(Time Domain Reflectometry) equipment and compared its electrical parasitic parameters with PCB RF circuits. With a BGA substrate of 3 $\times$ 3 input and output terminals, we have found that self capacitance of BGA solder ball is 68.6fF, self inductance 146pH, mutual capacitance 10.9fF and mutual inductance 16.9pH. S parameter measurement with a HP4396B Network Analyzer showed the resonance frequency of 1.55㎓ and the loss of 0.26dB. Thus, we may improve electrical performance when we use BGA package structures in the design of RF circuit modules.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.2
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• pp.15-22
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• 2013

Low-Temperature-cofired ceramics (LTCC) antenna packages have been extensively researched and utilized in recent years due to its excellent electrical properties and ease of implementing dense package integration topologies. This paper introduces some of the key research and development activities using LTCC packaging solutions for 60 GHz antennas at Samsung Electronics [1]. The LTCC 60 GHz antenna element topology is presented and its measured results are illustrated. However, despite its excellent performance, the high cost issues incurred with LTCC at millimeter wave (mmWave) frequencies for antenna packages remains one of the key impediments to mass market commercialization of mmWave antennas. To address this matter, for the first time to the author's best knowledge this paper alleviates the high cost of mmWave antenna packaging by devising a novel, broadband antenna package that is wholly based on low-cost, high volume FR4 Printed Circuit Board (PCB). The electrical properties of the FR4 substrate are first characterized to examine its feasibility at 60 GHz. Afterwards a compact multi-layer antenna package which exhibits more than 9 GHz measured bandwidth ($S_{11}{\leq}-10$ dB) from 57~66 GHz is devised. The measured normalized far-field radiation patterns and radiation efficiency are also presented and discussed.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.7
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• pp.351-363
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• 2001

This paper presents an experimental investigation on the heat trensfer characteristic of micro pipe (MHP) array with 38 triangular microgrooves. A heat pipe is an effective heat exchanger operating without external power. The heat pipe transfers heat by means of the latent heat of vaporization and two-phase fluid flow driven by the capillary force. The overall size of the MHP array can be put undermeath a microelectonic die and integrated into the electrronic package of a microelectronin device to dissipate the heat from the die. The MHP array is fabricated by micromachining with a silicon wafer and a glass substrate. The MHP was filled with water and sealed. The experimental results show the temperature decrease of 12.1$^{\circ}C$ at the evaporator section for the input power of 5.9 W and the improvement of 28% in the heat transfer rate.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.595-596
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• 2006

A novel Si via structure is suggested and fabricated for 3D MEMS package using the doped silicon as an interconnection material. Oxide isolations which define Si via are formed simultaneously when fabricating the MEMS structure by using DRIE and oxidation. Silicon Direct Bonding Multi-stacking process is used for stacked package, which consists of a substrate, MEMS structure layer and a cover layer. The bonded wafers are thinned by lapping and polishing. A via with the size of $20{\mu}m$ is fabricated and the electrical and mechanical characteristics of via are under testing.

• Journal of the Semiconductor & Display Technology
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• v.5 no.2 s.15
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• pp.33-36
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• 2006

Many issues arose to use the Pb-free solder as adhesive materials in MEMS ICs and packaging. Then this study for easy and simple sealing method using adhesive materials was carried out to maintain hermetic characteristic in MEMS Package. In this study, Hermetic characteristic using negative PR (XP SU-8 3050 NO-2) as adhesive at the interface of Si test coupon/glass substrate and Si test coupon/LTCC substrate was examined. For experiment, the dispenser pressure was 4 MPa and the $200\;{\mu}m{\Phi}$ syringe nozzle was used. 3.0 mm/sec as speed of dispensing and 0.13 mm as the gap between Si test coupon and nozzle was selected to machine condition. 1 min at $65^{\circ}C$ and 15 min at $95^{\circ}C$ as Soft bake, $200\;mj/cm^2$ expose in 365 nm wavelength as UV expose, 1 min at $65^{\circ}C$ and 6 min at $95^{\circ}C$ as Post expose bake, 60 min at $150^{\circ}C$ as hard bake were selected to activation condition of negative PR. Hermetic sealing was achieved at the Si test coupon/ glass substrate and Si test coupon/LTCC substrate. The leak rate of Si test coupon/glass substrate was $5.9{\times}10^{-8}mbar-l/sec$, and there was no effect by adhesive method. The leak rate of Si test coupon/LTCC substrate was $4.9{\times}10^{-8}mbar-l/sec$, and there was no effect by dispensing cycle. Better leak rate value could be achieved to use modified substrate which prevent PR flow, to increase UV expose energy and to use system that controls gap automatically with vision.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.63-70
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• 2023

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.43-49
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• 2019

In this study, a new approach using graphene oxide (GO) powder-composited Sn-3.0Ag-0.5Cu(in wt.%) solder paste for improving the bending reliability of solder joints between a flexible substrate and small outline package (SOP) was suggested. The GO addition slightly affected the melting temperature, however, the change in the melting temperature was not significant. Meanwhile, we observed the addition of GO could suppress IMC growth and IMC thickness of solder joint during the reflow process. Moreover, the cyclic bending test was also performed for evaluation of reliability in solder joint and we could improve the cyclic bending reliability of solder joint by adding GO powders. For 0.2 wt.% of GO added to the solder joint, the bending lifetime was increased to 20% greater than that without GO. Pull strength and ductility of the solder joint with GO were also higher than those of the joint without GO and it was assumed that this effect by adding GO could contribute to improve cyclic bending reliability of solder joint.

• Korean Journal of Metals and Materials
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• v.47 no.1
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• pp.26-31
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• 2009

The effects of $Ar/O_2$ ion-beam pre-treatment conditions on the interfacial adhesion energy of sputterdeposited Cu thin film to FR-4 substrate were systematically investigated in order to understand the interfacial bonding mechanism for practical application to advanced chip-in-substrate package systems. Measured peel strength increases from $45.8{\pm}5.7g/mm$ to $61.3{\pm}2.4g/mm$ by $Ar/O_2$ ion-beam pre-treatment with anode voltage of 64 V. Interfacial bonding mechanism between sputter-deposited Cu film and FR-4 substrate seems to be dominated by chemical bonding effect rather than mechanical interlocking effect. It is found that chemical bonding intensity between carbon and oxygen at FR-4 surface increases due to $Ar/O_2$ ion-beam pretreatment, which seems to be related to the strong adhesion energy between sputter-deposited Cu film and FR-4 substrate.

• The Journal of Information Systems
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• v.20 no.3
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• pp.111-127
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• 2011

This study is intended for international cooperation in the field of LED were analyzed. The results, LED wide coverage areas, and a promising future is expected to grow fast enough to occupancy for a major national technology is a competitive situation. Chip Scale Package, including our country, such as LED manufacturing technology that might be competitive in parts, but new technologies such as renal substrate R&D and technology development still active preemption is not the situation. Renal substrate, particularly, large-diameter sapphire, large size/large LED manufacturers, such as a promising area for future research and development support will be needed. To do this, previous research in this area and the U.S., Japan cooperation in such studies also will need to expand. Bibliometrics way through this study, analytical techniques and analytical tools used in the integrated analysis of the usefulness and necessity of the system development were found.