• 제목/요약/키워드: PZT interface

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PbO 완충층을 이용한 Pt/Pb1.1Zr0.53Ti0.47O3/PbO/Si (MFIS)의 미세구조와 전기적 특성 (Microstructure and Electrical Properties of the Pt/Pb1.1Zr0.53Ti0.47O3/PbO/Si (MFIS) Using the PbO Buffer Layer)

  • 박철호;송경환;손영국
    • 한국세라믹학회지
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    • 제42권2호
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    • pp.104-109
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    • 2005
  • PbO 완충층의 역할을 확인하기 위해, r.f. magnetron sputtering법을 이용하여 p-type (100) Si 기판 위에 $Pt/Pb_{1.1}Zr_{0.53}Ti_{0.47}O_{3}$와 PbO target으로 Pt/PZT/PbO/Si의 MFIS 구조를 제조하였다. MFIS 구조에 완충층으로 PbO를 삽입함으로써 PZT 박막의 결정성이 크게 향상되었고, 박막의 공정온도도 상당히 낮출 수 있었다. 그리고 XPS depth profile 분석 결과, PbO 증착시 기판온도가 PbO와 Si의 계면에서 Pb의 확산에 미치는 영향을 확인하였다. PbO 완충층을 삽입한 MFIS는 높은 메모리 윈도우와 낮은 누설전류 밀도를 가지는 추수한 전기적 특성을 나타내었다. 특히, 기판온도 $300^{\circ}C$에서 증착된 PbO를 삽입한 Pt/PZT(200nm, $400^{\circ}C)PbO(80nm)/Si$는 9V의 인가전압에서 2.OV의 가장 높은 메모리 윈도우 값을 나타내었다.

적층형 세라믹 액츄에이터의 세라믹-전극간 계면이 전기적 특성에 미치는 영향에 대한 연구 (Effect of Ceramic-Electrode Interface on the Electrical Properties of Multilayer Ceramic Actuators)

  • 하문수;정순종;송재성;이재신
    • 한국전기전자재료학회논문지
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    • 제15권10호
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    • pp.896-901
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    • 2002
  • The polarization and strain behavior of multilayer ceramic actuators fabricated by tape casting using a PNN-PZT ceramics were investigated in association with electrode size and internal layer number. Spontaneous polarization and strain decreased with increasing electrode size. In addition, the increase of internal layer number brought reduced spontaneous polarization and increased the field-induced strain. Because the actuators structure is designed to stack ceramic layer and electrode layer alternatively, the ceramic-electrode interfaces may act as a resistance to motion of domain wall. To analyze the effect of ceramic-electrode interface, the diffraction intensity ratio of (002) to (200) planes was calculated from X-ray diffraction patterns of samples subjected to a voltage of 200 V. The diffraction intensity ratio of (002) to (200) planes was decreased with increasing electrode size and internal layer number. The diffraction intensity ratio and straining behavior analyses indicate that the Polarization and strain were affected by the amount of 90°domain decreasing with increasing electrode size and internal layer number. Consequently, the change of polarization and displacement with respect to electrode size and layer number is likely to be caused by readiness of the domain wall movement around the interface.

졸겔법에 의해 제작된 강유전체 BST막의 기계.화학적인 연마 특성 (Chemical Mechanical Polishing (CMP) Characteristics of BST Ferroelectric Film by Sol-Gel Method)

  • 서용진;박성우
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제53권3호
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    • pp.128-132
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    • 2004
  • The perovskite ferroelectric materials of the PZT, SBT and BST series will attract much attention for application to ULSI devices. Among these materials, the BST ($Ba_0.6$$Sr_0.4$/$TiO_3$) is widely considered the most promising for use as an insulator in the capacitors of DRAMS beyond 1 Gbit and high density FRAMS. Especially, BST thin films have a good thermal-chemical stability, insulating effect and variety of Phases. However, BST thin films have problems of the aging effect and mismatch between the BST thin film and electrode. Also, due to the high defect density and surface roughness at grain boundarys and in the grains, which degrades the device performances. In order to overcome these weakness, we first applied the chemical mechanical polishing (CMP) process to the polishing of ferroelectric film in order to obtain a good planarity of electrode/ferroelectric film interface. BST ferroelectric film was fabricated by the sol-gel method. And then, we compared the surface characteristics before and after CMP process of BST films. We expect that our results will be useful promise of global planarization for FRAM application in the near future.

PZT/BT 박막의 전기적 특성 (Electrical Properties of PZT/BT Mulitilayered Films)

  • 이상헌;남성필;이영희;박재준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.189-190
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    • 2005
  • Ploycrystalline $Pb(Zr_{0.5},Ti_{0.5))O_3$ and $BaTiO_3$ powder were prepared by sol-gel process. The alumina substrate were sintered at $1400^{\circ}C$ with bottom electrode of Pt for 2 hours. The Pb(Zr0.5,Ti0.5)O3 / BaTiO3 multilayered thick films with laminating times were fabricated on alumina substrate by screening printing method. The obtained thick films were sintered at $800^{\circ}C$ with upper electrode of Ag paste for 1 hour. Structural properties of Pb(Zr0.5,Ti0.5)O3 / BaTiO3 multilayered thick films were investigated. As a result of the Differential Thermal Analysis(DTA) of Pb(Zr0.5,Ti0.5)O3, exothermic peak was observed at around 650 $^{\circ}C$. The X-ray diffraction (XRD) patterns indicated that BaTiO3 and Pb(Zr0.5,Ti0.5)O3 phases and porosities were formed in the interface of Pb(Zr0.5,Ti0.5)O3 / BaTiO3multilayered thick films.

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GROWTH AND ELECTRICAL PROPERTIES OF (La,Sr)CoO$_3$/Pb(Zr,Ti)O$_3$/(La,Sr)CoO$_3$ HETEROSTRUCTURES FOR FIELD EFFECT TRANSISTOR

  • Lee, J.;Kim, S.W.
    • 한국표면공학회지
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    • 제29권6호
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    • pp.839-846
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    • 1996
  • Epitaxial (La, Sr)$CoO_3/Pb(Zr,\;Ti)O_3/(La,\;Sr)CoO_3$by pulsed laser deposition for ferroelectric field effect transistor. Epitaxial $LaCoO_3/Pb(Zr,\;Ti)O_3/(La,\;Sr)CoO_3$ heterostructures exhibited 70$\mu C/cm^2$ and 17 $\mu C/cm^2$at a positively and negatively poled states, respectively. On the other hand, epitaxial (La, Sr)$CoO_3/Pb(Zr,\;Ti)O_3/LaCoO_3$heterostructures show the remnant polarization states opposite to the $LaCoO_3/Pb(Zr,\;Ti)O_3/(La,\;Sr)CoO_3$ heterostructures. This indicates that the interface between (La, Sr)$CoO_3$ (LSCO) and $Pb(Zr, Ti)O_3(PZT)$ layers affects the asymmetric polarization remanence through electrochemical nature. The resistivity of $LaCoO_3$ (LCO) layer was found to be dependent on an ambient oxygen, primarily the ambient oxygen pressure during deposition. The resistivity of the LCO layer varied in the range of 0.1-100 $\Omega$cm. It is suggested that, with an appropriate resistivity of the LCO layer, the LCO/PZT/LSCO heterostructure can be used as the ferroelectric field effect transistor.

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PZT/BT 세라믹 후막의 구조적 특성에 관한 연구 (A study on the Structural Properties of PZT/BT thick film)

  • 이상헌;임성수;이영희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 춘계학술대회 논문집
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    • pp.57-59
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    • 2005
  • Ploycrystalline $Pb(Zr_{0.5},Ti_{0.5})O_3$ and $BaTiO_3$ powder were prepared by sol-gel process. The alumina substrate were sintered at $1400^{\circ}C$ with bottom electrode of Pt for 2 hours. The Pb(Zr0.5,Ti0.5)O3 / BaTiO3 multilayered thick films with laminating times were fabricated on alumina substrate by screening printing method. The obtained thick films were sintered at $800^{\circ}C$ with upper electrode of Ag paste for 1 hour. Structural properties of Pb(Zr0.5,Ti0.5)O3 / BaTiO3 multilayered thick films were investigated. As a result of the Differential Thermal Analysis(DTA) of Pb(Zr0.5,Ti0.5)O3, exothermic peak was observed at around $650^{\circ}C$. The X-ray diffraction (XRD) patterns indicated that BaTi03 and Pb(Zr0.5,Ti0.5)O3 phases and porosities were formed in the interface of Pb(Zr0.5,Ti0.5)O3 / BaTiO3 multilayered thick films.

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PZT BT 이종 박막의 구조적 특성 (Structural Properties of PZT BT Mulitilayered Films)

  • 이상헌;임성수;이영희
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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    • pp.1960-1961
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    • 2005
  • Ploycrystalline $Pb(Zr_{0.5},Ti_{0.5})O_3$ and $BaTiO_3$ powder were prepared by sol-gel process. The alumina substrate were sintered at $1400^{\circ}C$ with bottom electrode of Pt for 2 hours. The Pb(Zr0.5, Ti0.5)O3/BaTiO3 multilayered thick films with laminating times were fabricated on alumina substrate by screening printing method. The obtained thick films were sintered at $800^{\circ}C$ with upper electrode of Ag paste for 1 hour, Structural properties of Pb(Zr0.5,Ti0.5)O3/BaTiO3 multilayered thick films were investigated. As a result of the Differential Thermal Analysis(DTA) of Pb(Zr0.5,Ti0.5)O3, exothermic peak was observed at around $650^{\circ}C$. The X-ray diffraction (XRD) patterns indicated that BaTiO3 and Pb(Zr0.5,Ti0.5)O3 phases and porosities were formed in the interface of Pb(Zr0.5,Ti0.5)O3 / EaTiO3 multilayered thick films.

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자기전기복합체의 비공진 및 공진 상태에서의 자기전기 결합 특성 평가 방법 (Demonstration of Magnetoelectric Coupling Measurement at Off-Resonance and Resonance Conditions in Magnetoelectric Composites)

  • ;류정호
    • 한국전기전자재료학회논문지
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    • 제35권4호
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    • pp.333-341
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    • 2022
  • 자기전기복합체(magnetoelectric, ME compositie)는 자왜재료와 압전재료의 결합현상을 이용하는 재료로서 지난 20여 년간 이론적, 실험적으로 많은 연구가 진행되어 왔다. 자기전기복합체의 출력특성은 구성하는 소재, 계면층, 복합체의 형상, 자기장하 진동모드 등의 많은 구성요소의 최적화를 통하여 급속히 향상되고 있다. 하지만 자기전기복합체의 자기전기 결합 특성 평가는 대부분의 연구들에서 구체적인 방법을 제시하지 않아 어떻게 측정한 것인지가 불명확한 경우가 많다. 본 논문에서는 자기전기복합체의 비공진, 공진상황에서 자기전기 전압계수를 어떻게 측정할 수 있는지에 대한 자세한 방법을 소개한다. 평가를 위한 샘플로서 대칭적인 구조를 가지는 Gelfenol/PMN-PZT/Gelfenol 자기전기복합체를 제조하였다. 압전 재료로는 이방성의 (011) 32 모드의 PMN-PZT 압전 단결정과 자왜재료로는 Galfenol 합금을 사용하여 에폭시로 접착하였다. 컴퓨터 인터페이스로 자동화된 자기전기 전압특성 측정 시스템의 구성을 우선 설명하고, 자기전기 결합특성의 측정 방법을 단계별로 설명한다. 본 튜토리얼 논문에서는 자기전기결합 특성과 특성평가방법을 이해하고자 하는 연구자들에게 도움이 될 수 있는 평가방법의 원리와 절차를 제공하고자 하였다.

가상물체 인식 실험을 위한 2차원 Haptic 인터페이스 장치의 구현 (Realization of a two dimensional Haptic Interfacing Apparatus for Virtual Object Recognition Experiments)

  • 이준철;장태정
    • 산업기술연구
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    • 제19권
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    • pp.415-421
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    • 1999
  • In this paper, a 2D X-Y table, two axes of which are symmetrical, and a force sensing device are constructed, which comprise a 2D haptic interfacing apparatus. Two DC motors are used for actuating the two axes of the table and two precision encoders for sensing the position of each axis. Four PZTs are used for sensing the direction and the magnitude of the 2D force applied to the force sensing device by the user. The performance of the 2D haptic interface device is tested by 2D virtual object recognition experiments.

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CeO$_2$ 박막의 구조적, 전기적 특성 연구 (A Study on the Structure and Electrical Properties of CeO$_2$ Thin Film)

  • 최석원;김성훈;김성훈;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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    • pp.469-472
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    • 1999
  • CeO$_2$ thin films have used in wide applications such as SOI, buffer layer, antirflection coating, and gate dielectric layer. CeO$_2$takes one of the cubic system of fluorite structure and shows similar lattice constant (a=0.541nm) to silicon (a=0.543nm). We investigated CeO$_2$films as buffer layer material for nonvolatile memory device application of a single transistor. Aiming at the single transistor FRAM device with a gate region configuration of PZT/CeO$_2$ /P-Si , this paper focused on CeO$_2$-Si interface properties. CeO$_2$ films were grown on P-type Si(100) substrates by 13.56MHz RF magnetron sputtering system using a 2 inch Ce metal target. To characterize the CeO$_2$ films, we employed an XRD, AFM, C-V, and I-V for structural, surface morphological, and electrical property investigations, respectively. This paper demonstrates the best lattice mismatch as low as 0.2 % and average surface roughness down to 6.8 $\AA$. MIS structure of CeO$_2$ shows that breakdown electric field of 1.2 MV/cm, dielectric constant around 13.6 at growth temperature of 200 $^{\circ}C$, and interface state densities as low as 1.84$\times$10$^{11}$ cm $^{-1}$ eV$^{-1}$ . We probes the material properties of CeO$_2$ films for a buffer layer of FRAM applications.

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