• Title/Summary/Keyword: PWM filter

Search Result 310, Processing Time 0.024 seconds

A Study on Harmonic Resonance in a DFIG Wind Turbine-generator Connected to a Distribution Power Line (DFIG 풍력발전기가 연계된 배전선로의 고조파 공진 특성에 관한 연구)

  • Choi, Hyung-Joo;Lee, Heung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.62 no.10
    • /
    • pp.1383-1389
    • /
    • 2013
  • There were telecommunication noise and malfunctions of the electronic devices occurred over a wide area due to the high harmonic voltage and/or current levels of the Back-to-back converter in the DFIG wind power system even though the magnitude of all harmonics is within the international standards. The triangular carrier signals of the PWM used in the power converter system is related to the telecommunication noise because they are in the range of audible frequencies and amplified by a variety of the standing waves that were excited by harmonic voltage sources in the weak grid system such as a long distance distribution transmission lines. This paper describes the characteristics of the harmonics in the wind turbine-generator, numerical analysis and simulation of the harmonics resonance phenomena in the distribution lines as well as measuring induced voltage of the telecommunication lines in parallel with power lines in order to verify the root cause of the telecommunication noise. These noise problems can occur in a wind turbine power system with a non-linear converter at any time, as well as photovoltaic power system. So, the preliminary review of suitable filter devices and switching frequencies of the PWM have to be required by considering the stability of the controller at the design stage but as part of the measures the effect of the telecommunication cable shields was analyzed by comparing the measured data between multi-conductor with/without shields so as to attenuate the sources of the harmonics voltage induced into the telecommunication lines and to apply the most cost-effective measures in the field.

A Design of Power Converter for Fuel Cell Controlled by Micro-Processor (마이크로프로세서에 의해 제어되는 연료전지용 전력변환 회로 설계)

  • Won, Chung-Yuen;Jang, Su-Jin;Lee, Won-Chul;Lee, Tae-Won;Kim, Soo-Seok
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.18 no.5
    • /
    • pp.61-68
    • /
    • 2004
  • Recently, a fuel cell is remarkable for new generation system. The fuel cell is characterized by low voltage and high current. Therefor, for connecting to general load, it needs both a step up converter and an inverter. The proposed system consists of an isolated DC-DC converter to boost the fuel cell voltage to 380[Vdc] and a PWM inverter with LC filter to convert the dc voltage to single phase 220[Vac]. Also, bi-directional DC-DC converter for fuel cell generation system is composed to improve load response characteristic. In this paper, full bridge converter and the single phase inverter are designed and installed for fuel cell. Simulation and experiment verify that fuel cell generation system could be applied for the distributed generation.

Current Unbalance Improved Half-bridge LLC Resonant Converter using the Two Transformers (두 개의 변압기를 이용한 전류불균형 개선 하프브리지 LLC 공진형 컨버터)

  • Yoo, Doo-Hee;Jeong, Gang-Youl
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.11 no.2
    • /
    • pp.497-507
    • /
    • 2010
  • This paper presents current unbalance improved half-bridge LLC resonant converter using the two transformers with different leakage inductances. The proposed converter resonates with the leakage inductance and magnetizing inductance of the transformer and the resonant capacitance. The converter operates in a wide load range and satisfies the zero voltage switching even under the light load. The series-parallel connected two transformers act as the transformers or the resonant inductances according to the operational modes, and the separate output filter inductance in the transformer secondary is not needed using the leakage inductance. The current unbalance of the secondary diode rectifier is improved using the different leakage inductances of the two transformers and the asymmetrical pulse-width modulation (PWM). In this paper, the operational principle of the converter is explained by the modes, and the design example for the prototype is also shown. To validate the performance of the converter, the prototype is implemented as the designed circuit parameters and the good performance of the proposed converter is shown through the experimental results

Class-D Digital Audio Amplifier Using 1-bit 4th-order Delta-Sigma Modulation (1-비트 4차 델타-시그마 변조기법을 이용한 D급 디지털 오디오 증폭기)

  • Kang, Kyoung-Sik;Choi, Young-Kil;Roh, Hyung-Dong;Nam, Hyun-Seok;Roh, Jeong-Gin
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.45 no.3
    • /
    • pp.44-53
    • /
    • 2008
  • In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

New Strategy for Eliminating Zero-sequence Circulating Current between Parallel Operating Three-level NPC Voltage Source Inverters

  • Li, Kai;Dong, Zhenhua;Wang, Xiaodong;Peng, Chao;Deng, Fujin;Guerrero, Josep;Vasquez, Juan
    • Journal of Power Electronics
    • /
    • v.18 no.1
    • /
    • pp.70-80
    • /
    • 2018
  • A novel strategy based on a zero common mode voltage pulse-width modulation (ZCMV-PWM) technique and zero-sequence circulating current (ZSCC) feedback control is proposed in this study to eliminate ZSCCs between three-level neutral point clamped (NPC) voltage source inverters, with common AC and DC buses, that are operating in parallel. First, an equivalent model of ZSCC in a three-phase three-level NPC inverter paralleled system is developed. Second, on the basis of the analysis of the excitation source of ZSCCs, i.e., the difference in common mode voltages (CMVs) between paralleled inverters, the ZCMV-PWM method is presented to reduce CMVs, and a simple electric circuit is adopted to control ZSCCs and neutral point potential. Finally, simulation and experiment are conducted to illustrate effectiveness of the proposed strategy. Results show that ZSCCs between paralleled inverters can be eliminated effectively under steady and dynamic states. Moreover, the proposed strategy exhibits the advantage of not requiring carrier synchronization. It can be utilized in inverters with different types of filter.

Performance Evaluations of Four MAF-Based PLL Algorithms for Grid-Synchronization of Three-Phase Grid-Connected PWM Inverters and DGs

  • Han, Yang;Luo, Mingyu;Chen, Changqing;Jiang, Aiting;Zhao, Xin;Guerrero, Josep M.
    • Journal of Power Electronics
    • /
    • v.16 no.5
    • /
    • pp.1904-1917
    • /
    • 2016
  • The moving average filter (MAF) is widely utilized to improve the disturbance rejection capability of phase-locked loops (PLLs). This is of vital significance for the grid-integration and stable operation of power electronic converters to electric power systems. However, the open-loop bandwidth is drastically reduced after incorporating a MAF into the PLL structure, which makes the dynamic response sluggish. To overcome this shortcoming, some new techniques have recently been proposed to improve the transient response of MAF-based PLLs. In this paper, a comprehensive performance comparison of advanced MAF-based PLL algorithms is presented. This comparison includes HPLL, MPLC-PLL, QT1-PLL, and DMAF-PLL. Various disturbances, such as grid voltage sag, voltage flicker, harmonics distortion, phase-angle and frequency jumps, DC offsets and noise, are considered to experimentally test the dynamic performances of these PLL algorithms. Finally, an improved positive sequence extraction method for a HPLL under the frequency jumps scenario is presented to compensate for the steady-state error caused by non-frequency adaptive DSC, and a satisfactory performance has been achieved.

The Improvement of Output Voltage of UPS Using a Parallel Control Method (병렬 제어기법을 이용한 UPS 출력 전압의 개선)

  • 成 炳 模;姜 弼 淳;朴 晟 濬;金 喆 禹
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.7 no.2
    • /
    • pp.158-164
    • /
    • 2002
  • This paper presents a proper parallel control method using a conventional control and a repetitive control for improving the output voltage waveform of uninterruptable power supply. Although first-order prediction control method shows a good characteristics to rectifier load, it is not sufficient to reduce steady state errors generated in nonlinear loads such as rectifier loads and phase controled loads. So we also employed a repetitive control method. A repetitive control method can eliminate steady state errors in the distorted output voltage caused by cyclic loads. The presented control scheme is verified through simulation and experiment. Experimental results Implemented on a single phase PWM inverter equipped with a LC output filter with 3 kVA, 60 Hz are shown.

Cost-Effective APF/UPS System with Seamless Mode Transfer

  • Lee, Woo-Cheol
    • Journal of Electrical Engineering and Technology
    • /
    • v.10 no.1
    • /
    • pp.195-204
    • /
    • 2015
  • In this paper, the development of a cost-effective active power filter/uninterruptible power supply (APF/UPS) system with seamless mode transfer is described. The proposed scheme employs a pulse-width-modulation (PWM) voltage-source inverter and has two operational modes. First, when the source voltage is normal, the system operates as an APF, which compensates for the harmonics and power factor while boosting the DC-link voltage to be ready for the disturbance, without an additional DC charging circuit. A simple algorithm to detect the load current harmonics is also proposed. Second, when the source voltage is out of the normal range (owing to sag, swell, or outage), it operates a UPS, which controls the output voltage constantly by discharging the DC-link capacitor. Furthermore, a seamless transfer method for the single-phase inverter between the APF mode and the UPS mode is also proposed, in which an IGBT switch with diodes is used as a static bypass switch. Dissimilar to a conventional SCR switch, the IGBT switch can implement a seamless mode transfer. During the UPS operation, when the source voltage returns to the normal range, the system operates as an APF. The proposed system has good transient and steady-state response characteristics. The APF, charging circuit, and UPS systems are implemented in one inverter system. Finally, the validity of the proposed scheme is investigated with simulated and experimental results for a prototype APF/UPS system rated at 3 kVA.

Design of -60dB THD, 32ohm Load, 0.7Vrms Output Low Power CMOS class AB Stereo Audio Amplifier (-60dB THD, 32ohm load, 0.7Vrms 출력의 저전력 CMOS class AB Stereo Audio Amplifier 설계)

  • Kim, Ji-Hoon;Park, Sang-Hune;Park, Hong-June;Kim, Tae-Ho;Jung, Sun-Yeop
    • Proceedings of the IEEK Conference
    • /
    • 2005.11a
    • /
    • pp.905-908
    • /
    • 2005
  • 본 논문에서는 class AB opamp 를 채용한 384kHz differential PWM 신호를 입력으로 하는 2-channel stereo audio amplifier 블록을 공급전압 3.3V 조건에서 SMIC 0.18um thick oxide 기술을 이용하여 설계한다. 여기서 class AB opamp 는 공정 변화에 따른 quiescent current가 변하는 것을 최소화하기 위하여 adaptive load 를 사용하며, 전체적으로는 3 차 Butterworth lowpass filter 와 differential-to-single converter 로 구성된 2 개의 audio amplifier 와 출력전압이 ${\frac{1}{2}}Vdd$ 인 common output 블록으로 구성된다. 이러한 설계를 통하여 32ohm 의 저항 load 를 구동할 수 있는 -60dB THD, 전체 quiescent current 2mA 대인 CMOS class AB stereo audio amplifier 를 구현하였다.

  • PDF

A Novel Three Level DC/DC Converter for High power applications operating from High Input Voltage (대용량 및 높은 입력전압에 적합한 새로운 Three Level DC/DC 컨버터)

  • Han S.K.;Oh W.S.;Moon G.W.;Youn M.J.
    • Proceedings of the KIPE Conference
    • /
    • 2003.07a
    • /
    • pp.317-322
    • /
    • 2003
  • A novel three-level DC/DC converter (TLC)for high power applications operating from high input voltage Is proposed. Its switch voltage stress can be ensured to be only one-half of the Input voltage. Nevertheless, since all input voltage is applied to the transformer primary side, it has good turns ratio. The driving method of each module is same as those of the conventional phase-shifted ZVS full bridge PWM converter (PSFB) and the zero-voltage-switching (ZVS) of the leading leg are achieved exactly in the same manner as that of the PSFB. Moreover, its three-level operation can considerably reduce the current ripple through the output inductor and it has no problems of the DC-link voltage unbalance. Therefore, it features a low voltage stress, high efficiency, low EMI, high power density, and small sized filter. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 200W, 600V/DC-48V/DC prototype are presented.

  • PDF