• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.965-968
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• 2003

This paper describes the PWM-VSI controller of three-phase UPS system using stationary reference frame. This controller meets the specification the UPS inverter output voltage even under the unbalanced or nonlinear load. This controller is also constructed with duble control loop of the outer voltage control loop and the inner current control loop. For the fast response of the output voltage control, yhr inner current control loop of the capacitor current os used. To get the good property against overshoot, the If controller us used. The outer voltage controller is designed with P controller and the high gain transfer function is used for the zero steady state error. All control gains of both controller is designed base on the CDM method.

• Journal of Electrical Engineering and Technology
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• 제9권4호
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• pp.1324-1331
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• 2014

This paper proposes a compensation PWM technique for the extension of output voltage ranges in three-phase VSI applications using three shunt resistors. The proposed technique aims to solve the dead zone, which occurs in high modulation indexes. In the dead zone, two phase currents cannot be sampled correctly, so that the three-phase VSI cannot be operated up to the maximum output voltage. The dead zone is analyzed in detail, and the compensation PWM algorithm is developed. The proposed algorithm is verified by numerical analysis and experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.148-150
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• 1988

The output characteristics of VSI by transistor depend upon bias signal with drive circuit. As the CTI is one of the VSI, takes case PWM output voltage. This Inverter operation is based upon position and negative of sinusoldal PWM signal by carrier triangular wave and compared sine one. Besides, the Inverter operation system required digital signal for microprocessor, sampling method of Inverter driver signals study for get rid of generated signal is error. In the paper, the method of 3 level PWM signal for CTI was studied. This method of signals depend upon caculated switching position of natural sampling with $10^{-6}$ modulation error for time flowchart programs.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.443-447
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• 1999

The AC drive systems of a voltage source inverter and an induction motor. The inverter non linearity caused by the turn on/off time dependency of the current level in the switching IGBT is described in the first part of this paper. To improve the low-speed drive characteristics, accurate applied voltage calculation is proposed under considerations of the compensations for the quantization error in the digital controller, the forward voltage drop of switching drives and the dead time of the inverter. The experimental studies show the improved drive characteristics.

• Journal of Power Electronics
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• 제10권1호
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• pp.43-50
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• 2010

This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.

• 대한전자공학회논문지
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• 제26권11호
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• pp.1829-1838
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• 1989

This paper is proposed one method of the exact optimal switching pattern of Selected Harmonic Elimination(SHE) Pulse Width Modulation(PWM). It defined Harmonic Elimination Band (HEB) at Constant Voltage(CV) and sought all solutions which are included HEB. Then, it calculated the Generalized Klirr Factor(GKF) beling to this solution and decided the optimal switching pattern which is minimized GKF. This optimal switching solution is used as initial condition of Newto Raphson(NR) method of decided easily switching pattern at Variable Voltage(VV). We desined the inverter by Power Transister(PTR) and implemented variable speed drive of Induction Motor(IM) in order to verify the validity of this theoretical proposition, then shown this results by comparison and analysis.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.292-294
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• 2006

This paper presents a study on the use of improved space-vector modulation of VSI employing only four switches, four body diodes. Different switching sequence strategy for vector control for inverter fault mode are described. The influence of different switching patterns at same modulation index and improved PWM method is proposed. The proposed PWM is compared with conventional PWM. Simulation and experimental results are presented.

• 전력전자학회논문지
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• 제26권2호
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• pp.120-126
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• 2021

DC-link capacitors are one of the main components in two-level three-phase voltage source inverters (VSIs); they provide the pulsating input current and stabilize the vacillating DC-link voltage. Ideally, the larger the capacitance of DC-link capacitors, the better the DC-link voltage stabilizes. However, high capacitance increases the cost and decreases the power density of VSI systems. Therefore, the capacitance should be chosen carefully on the basis of the DC-link voltage ripple requirement. However, the DC-link voltage ripple is dependent on the pulse-width modulation (PWM) strategy. This study especially presents a DC-link voltage ripple analysis when the minimum loss discontinuous PWM strategy is applied. Furthermore, an equation for the selection of the minimum capacitance of DC-link capacitors is proposed. Experimental results with R-L loads are also provided to verify the effectiveness of the presented analysis.

• 전기전자학회논문지
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• 제4권2호
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• pp.225-232
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• 2000

전압원 인버터의 PWM 신호에 삽입되는 데드 타임은 인버터 출력 파형을 왜곡시키고, 토크 리플을 발생시켜 유도 전동기의 제어 성능을 떨어뜨린다. 본 논문에서 벡터 제어 유도 전동기의 데드 타임 보상 방법이 제안된다. 제안된 방법은 2상 정지 좌표계에서 인버터 출력 기준전압에 보상 전압을 더하는 전향 보상에 근거한다. 제안된 방법은 부가적인 하드웨어 없이 소프트웨어적으로 실현 가능하다. 실험 결과를 통하여 제안된 방법의 타당성과 유용성을 확인한다.

• Journal of Power Electronics
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• 제17권5호
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• pp.1244-1255
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• 2017

The space vector pulse width modulation (SVPWM) technique is a popular PWM method for medium voltage drive applications. Conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are the most common SVPWM techniques. This paper evaluates the performance of various advanced BCSVPWM strategies in terms of their harmonic distortion and switching loss based on a uniform frame work. A uniform frame work, pulse number captures the performance parameter variations of different SVPWM strategies for various number of samples with heterogeneous pulse numbers. This work compares different advanced BCSVPWM techniques based on the modulation index and location of the clamping position (zero vector changing angle ) of a phase in a line cycle. The frame work provides a fixed fundamental frequency of 50Hz. The different BCSVPWM switching strategies are implemented and compared experimentally on a 415V, 2.2kW, 50Hz, 3-phase induction motor drive which is fed from an IGBT based 2 KVA voltage source inverter (VSI) with a DC bus voltage of 400 V. A low cost PIC microcontroller (PIC18F452) is used as the controller platform.