• Title/Summary/Keyword: PRESENT 알고리듬

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A Study on Lucifer-Type Encryption Algorithm (Lucifer 형태의 암호화 알고리듬에 관한 연구)

  • Gahng, Hae-Dong;Lee, Chang-Soon;Moon, Sang-Jae
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.3
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    • pp.32-39
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    • 1989
  • This paper presents Lucifer-type encryption algorythms with variable length of block size of 32, 64, and 256 bits by varying the key byte access schedule and the unfolded convolution register of Lucifer. The intersymbol dpendence and exhaustive cryptanalysis of the algorithms are examined and compared. We also present the methods which improve the intersymbol dependence such as moving the location of key interruption and autoclave selection of S-box.

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Optimal Design of Squeeze Film Damper Using an Enhanced Genetic Algorithm (향상된 유전알고리듬을 이용한 스퀴즈 필름 댐퍼의 최적설계)

  • 김영찬;안영공;양보석
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2001.11b
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    • pp.805-809
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    • 2001
  • This paper is presented to determine the optimal parameters of squeeze film damper using an enhanced genetic algorithm (EGA). The damper design parameters are the radius, length and radial clearance of the damper. The objective function is minimization of a transmitted load between bearing and foundation at the operating and critical speeds of a flexible rotor. The present algorithm was the synthesis of a genetic algorithm with simplex method for a local concentrate search. This hybrid algorithm is not only faster than the standard genetic algorithm, but also gives a more accurate solution and can find both the global and local optimum solution. The numerical example is presented that illustrated the effectiveness of enhanced genetic algorithm for the optimal design of the squeeze film damper for reducing transmitted load.

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Pareto optimum design of journal bearings by artificial life algorithm (인공생명최적화알고리듬에 의한 저널베어링의 파레토 최적화)

  • Song, Jin-Dae;Yang, Bo-Suk
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2005.11a
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    • pp.869-874
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    • 2005
  • This paper proposes the Pareto artificial life algorithm for a multi-objective function optimization problem. The artificial life algorithm for a single objective function optimization problem is improved through incorporating the new method to estimate the fitness value fur a solution and the Pareto list to memorize and to improve the Pareto optimal set. The proposed algorithm is applied to the optimum design of a Journal bearing which has two objective functions. The Pareto front and the optimal solution set for the application are reported to present the possible solutions to a decision maker or a designer.

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Research on PSNF-m algorithm applying track management technique (트랙관리 기법을 적용한 PSNF-m 표적추적 필터의 성능 분석 연구)

  • Yoo, In-Je
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.6
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    • pp.681-691
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    • 2017
  • In the clutter environment, it is necessary to update the target tracking filter by detecting the target signal among many measured value data obtained via the radar system, the track does not diverge, and tracking performance is maintained. The method of associating the measurement most relevant to the target track among numerous measurement values is referred to as data association. PSNF and PSNF-m are data association methods of SN-series. In this paper, we provide an IPSNF-m(Integrated Probabilistic Strongest Neighbor Filter-m) algorithm with a track management method based on the track existence probability in PSNF-m algorithm. This algorithm considers not only the presence of the target but also the case where the target is present but not detected. Calculating the probability of each caseenables efficient management. In order to verify the performance of the proposed IPSNF-m, the track existence probability of the IPSNF algorithm applying the track management technique to PSNF, which is known to have similar performance to PSNF-m, is derived. Through simulation in the same environment, we compare and analyze the proposed algorithm with RMSE, Confirmed True Track, and Track Existence Probability that show better performance in terms of track retention and estimation than the existing PSNF-m and IPSNF algorithms.

A Design of PRESENT Crypto-Processor Supporting ECB/CBC/OFB/CTR Modes of Operation and Key Lengths of 80/128-bit (ECB/CBC/OFB/CTR 운영모드와 80/128-비트 키 길이를 지원하는 PRESENT 암호 프로세서 설계)

  • Kim, Ki-Bbeum;Cho, Wook-Lae;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.6
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    • pp.1163-1170
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    • 2016
  • A hardware implementation of ultra-lightweight block cipher algorithm PRESENT which was specified as a standard for lightweight cryptography ISO/IEC 29192-2 is described. The PRESENT crypto-processor supports two key lengths of 80 and 128 bits, as well as four modes of operation including ECB, CBC, OFB, and CTR. The PRESENT crypto-processor has on-the-fly key scheduler with master key register, and it can process consecutive blocks of plaintext/ciphertext without reloading master key. In order to achieve a lightweight implementation, the key scheduler was optimized to share circuits for key lengths of 80 bits and 128 bits. The round block was designed with a data-path of 64 bits, so that one round transformation for encryption/decryption is processed in a clock cycle. The PRESENT crypto-processor was verified using Virtex5 FPGA device. The crypto-processor that was synthesized using a $0.18{\mu}m$ CMOS cell library has 8,100 gate equivalents(GE), and the estimated throughput is about 908 Mbps with a maximum operating clock frequency of 454 MHz.

A Hardware Implementation of Ultra-Lightweight Block Cipher PRESENT-80/128 (초경량 블록암호 PRESENT-80/128의 하드웨어 구현)

  • Cho, Wook-Lae;Kim, Ki-Bbeum;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.430-432
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    • 2015
  • This paper describes a hardware implementation of ultra-lightweight block cipher algorithm PRESENT-80/128 that supports for two master key lengths of 80-bit and 128-bit. The PRESENT algorithm that is based on SPN (substitution and permutation network) consists of 31 round transformations. A round processing block of 64-bit data-path is used to process 31 rounds iteratively, and circuits for encryption and decryption are designed to share hardware resources. The PRESENT-80/128 crypto-processor designed in Verilog-HDL was verified using Virtex5 XC5VSX-95T FPGA and test system. The estimated throughput is about 550 Mbps with 275 MHz clock frequency.

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A NOVEL METHOD FOR REFINING A META-MODEL BY PARETO FRONTIER (파레토 프론티어를 이용한 메타모델 정예화 기법 개발)

  • Jo, S.J.;Chae, S.H.;Yee, K.J.
    • Journal of computational fluids engineering
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    • v.14 no.4
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    • pp.31-40
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    • 2009
  • Although optimization by sequentially refining metamodels is known to be computationally very efficient, the metamodel that can be used for this purpose is limited to Kriging method due to the difficulties related with sample points selections. The present study suggests a novel method for sequentially refining metamodels using Pareto Frontiers, which can be used independent of the type of metamodels. It is shown from the examples that the present method yields more accurate metamodels compared with full-factorial optimization and also guarantees global optimum irrespective of the initial conditions. Finally, in order to prove the generality of the present method, it is applied to a 2D transonic airfoil optimization problem, and the successful design results are obtained.

A Study on Variable Step Size LMS Algorithm using estimated correlation (추정상관값을 이용한 가변 스텝사이즈 LMS 알고리듬에 관한 연구)

  • 권순용;오신범;이채욱
    • Proceedings of the IEEK Conference
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    • 2000.11d
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    • pp.115-118
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    • 2000
  • We present a new variable step size LMS algorithm using the correlation between reference input and error signal of adaptive filter. The proposed algorithm updates each weight of filter by different step size at same sample time. We applied this algorithm to adaptive multip]e-notch filter. Simulation results are presented to compare the performance of the proposed algorithm with the usual LMS algorithm and another variable step algorithm.

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A Comparative Performance Analysis of Blocking Artifact Reduction Algorithms (블록화 현상 제거 알고리듬의 성능 비교 분석)

  • 소현주;장익훈김남철
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.907-910
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    • 1998
  • In this paper, we present a comparative performance analysis of several blocking artifact reduction algorithms. For the performance analysis, we propose a block boundary region classification algorithm which classifies each horizontal and vertical block boundary into four regions using brightness change near the block boundary. The PSNR performance of each algorithm is compared. The MSE according to each block boundary region is also compared. Experimental results show that the wavelet transform based blocking artifact reduction algorithms have better performance over the other methods.

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유전자 알고리듬을 이용한 블럭단위의 설비배치에 관한 연구

  • 우성식;박양병
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 1996.10a
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    • pp.45-48
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    • 1996
  • The most research on facility layout problems ignored the actual shape of building where the activities(departments) are to be arranged. They also ignored the aisles between departments inside the building. In this paper, we present a genetic algorithm that searches a very good facility layout with horizontal aisles for two different cases with respect to the department shape. From the extensive experiments, the proposed genetic algorithm generated better layouts than the ones obtained by applying Tam's algorithm. It showed about 10% improvement of performance. We found out the best combination of genetic operators through the experiments.

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