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http://dx.doi.org/10.6109/jkiice.2016.20.6.1163

A Design of PRESENT Crypto-Processor Supporting ECB/CBC/OFB/CTR Modes of Operation and Key Lengths of 80/128-bit  

Kim, Ki-Bbeum (School of Electronic Engineering, Kumoh National Institute of Technology)
Cho, Wook-Lae (School of Electronic Engineering, Kumoh National Institute of Technology)
Shin, Kyung-Wook (School of Electronic Engineering, Kumoh National Institute of Technology)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.20, no.6, 2016 , pp. 1163-1170 More about this Journal
Abstract
A hardware implementation of ultra-lightweight block cipher algorithm PRESENT which was specified as a standard for lightweight cryptography ISO/IEC 29192-2 is described. The PRESENT crypto-processor supports two key lengths of 80 and 128 bits, as well as four modes of operation including ECB, CBC, OFB, and CTR. The PRESENT crypto-processor has on-the-fly key scheduler with master key register, and it can process consecutive blocks of plaintext/ciphertext without reloading master key. In order to achieve a lightweight implementation, the key scheduler was optimized to share circuits for key lengths of 80 bits and 128 bits. The round block was designed with a data-path of 64 bits, so that one round transformation for encryption/decryption is processed in a clock cycle. The PRESENT crypto-processor was verified using Virtex5 FPGA device. The crypto-processor that was synthesized using a $0.18{\mu}m$ CMOS cell library has 8,100 gate equivalents(GE), and the estimated throughput is about 908 Mbps with a maximum operating clock frequency of 454 MHz.
Keywords
Lightweight Block Cipher; IoT Security; PRESENT algorithm; Information Security; Mode of Operation;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
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