• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.153-159
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• 2009

A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1064-1065
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• 2015

단상 계통 연계형 전력 변환기에서 계통과 연계하기 위해서는 계통의 위상 정보를 정확히 측정하여 전력 변환기의 출력 주파수와 위상이 동일한 상태로 전류가 공급 되도록 해야 한다. 본 논문에서는 단상 d-q 좌표 변환 기법을 통한 위상 동기화 기법을 적용하여 왜곡된 계통전압이 d축 전압에 야기 되는 에러 성분을 최소화 하는 보상 기법을 제안한다. 제안된 기법은 동기 d축 전압을 일정한 주기로 적분하여 에러 성분을 최소화 한 후, PI제어를 통해 d축 전압을 0으로 수렴하게 하는 기법이다. 제안된 기법은 추가적인 하드웨어를 요구하지 않는다. 본 논문의 타당성을 검증하기 위해 3[kW]급 단상 계통 연계형 전력변환기 시작품을 제작하고 실험을 통해 증명하였다.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.4 no.2
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• pp.55-62
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• 1990

I본 연구에서는 마이크로프로세서에 의한 3상 전파 제어정류기의 점호각 제어회로를 설계하였다. 제어회로는 8비트 마이크로프로세서, 점호신호 발생 ROM, Presettable카운터, N분주 카운터와 PLL IC 등으로 구성되어 있다. PLL 원리를 이용하여 주파수 체배회로를 구성하였기 때문에 점호각이 넓은 범위의 전원 주파수에서 제어될 수 있고 간단한 제어알고리즘으로 인해 처리시간이 줄어들므로 빠른 응답특성을 가질 수 있었다. 본 연구에서는 기본 동작원리와 회로의 동작 특성에 대하여 설명하였고 좋은 동작 특성을 실험을 통해서 확인하였다. 이러한 동작원리는 싸이클로컨버터, 3상 교류 전압 조정기, dc 서보제어기와 다른 제어 시스템 등에도 적용이 가능할 것으로 생각된다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.443-447
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• 2001

The PLL synthesizer is used often in communication system due to several merits, such as broad bandwidth, high accuracy and stability of frequency. But it is difficult to use in torrent digital communication systems that need frequency hopping at a high speed because of its long frequency hopping time. In this paper, we designed frequency synthesizer that generate the clock frequency randomly at a high speed using the DDS technology and is applied to the pattern generator system for digital image.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.197-200
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• 2001

Recently, Switching time is the principal factor in a design of frerquency synthesizer for Spread-Spectrum Communications. fast switching frequency synthesizer is important to improve the channel efficiency in a Frequency Hopping Spread Spectrum (FH-SS) tranceiver. In this paper, we design the frequency synthesizer with fast switching time as fast as 1${\mu}\textrm{s}$. In frequency synthesizer design, we use the interpolated PLL method inserted memory Look-up table of DDS to reduce switching time, and have result of improved channel efficiency about 20% by applying to FH-SS Transceiver.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.113-118
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• 2010

In This Paper, at the PSPICE model is presented by Piezoelectric Transformer and CCFL and equivalent circuit of fluorescent light. Highly effective fluorescent light release for next generation is developed for 35W supremacy model three wave length T5 fluorescent lamps. Lighting a candle experiment of T5 fluorescent lamps is carried out by employing Piezoelectric Transformer power-factor improvement circuit and inverter. PLL method is used for supplying a correct frequency of Piezoelectric Transformer operating.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.412-414
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• 1999

The FSK demodulation module is the circuit which detects the data being transmitted from reader by FSK method. It doesn't use the PLL, and has lower power consumption and easier integration than conventional FSK detector using the PLL. So in a smart card, it is suitable to apply. In this study, the FSK demodulation module of the low power smart card is designed and analyzed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.3
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• pp.224-238
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• 1987

In the proposed spectrum analyzer, open-loop VCO is replaced with PLL synthesizer incorporating digital frequency synthesizer using modulofunction for measuring precise frequencys. Three different frequency bands and channel spacings are realized by single loop synthesizer through the effective design of the system. The newly designed system with square detection has a good linearity of input range from 10mV to 8.5V, as a result the input sensitivity has been improved up to 500uV. The storage function enables us to analyze not only periodic but also nonperiodic wave-form and zoom-in function expands frequency resolution eight times for the dense spectra.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2568-2571
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• 2002

A LCD backlight inverter control IC based on the piezoelectric transformer (PZT) for Cold Cathode Fluorescent Lamp (CCFL) lighting is proposed. It is indeed a variable frequency, variable duty (VFVD) controller having dual feedback control loops for achieving both the regulation of lamp current and the maximum efficiency. The PWM controller regulates the lamp current, while the PLL controller tunes the operating frequency to the frequency that the efficiency of the combined LC-PZT resonator becomes maximum. The mixed PLL/PWM control technique lets the backlight inverter operate at the maximum efficiency in spite of the variation of component and environment. The controller features include a protection for an open or broken lamps, and an open lamp regulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.4
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• pp.598-603
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• 1990

This study evaluates the performance of an optical receiver for binary phase shift keying (BPSK) signals in the presence of short noise originating from the photo diode and phase noise of the optical source. The case of using I.O. hybrid compare with the fiber optic hybrid to mix received optical signal and laser local oscillator signal. The impact of these noise is minimized if loop natural frequency and power split ratio between data and carrier recovery branch are choosen optimally. Then it is obtained that required laser linewidt to achieve a BER of 10**-9. The results are the same except theat in case of using the fiber optic hybrid the required optical power is twice as much as the I.O. hybrid.