• Journal of the Korea Society of Computer and Information
• /
• v.28 no.12
• /
• pp.231-238
• /
• 2023

For boost PFC (Power Factor Correction) converters, various control methods are being studied to achieve unity power factor and low THD (Total Harmonic Distortion) of AC input current. Among them, average current mode control, which controls the average value of the inductor current to follow the current reference, is the most widely used. However, nowadays, as advanced digital control becomes possible with the development of digital processors, predictive control of boost PFC converters is receiving attention. Predictive control is classified into predictive current mode control, which generates duty in advance using a predictive algorithm, and model predictive current control, which performs switching operations by selecting a cost function based on a model. Therefore, this paper simply explains the average current mode control, predictive current mode control, and model predictive current control of the boost PFC converter. In addition, current control under entire load and disturbance conditions is compared and analyzed through simulation.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.22 no.6
• /
• pp.527-534
• /
• 2017

This paper proposes a new DC link voltage controller for a single-phase power factor correction (PFC) boost converter. The load current of the PFC boost converter affects the capacitor current, whereas the load current changes the output voltage. However, previous works that compensate output current have failed to consider the relationship between load current and duty. Thus, they also fail to maintain a constant output voltage if the load fluctuates under the conditions of a non-rated input voltage. By considering the duty in the load current compensation, the proposed method improves the load transient response regardless of the input voltage. To demonstrate its effectiveness, the proposed method is compared with other control methods by conducting PSM simulations and experiments under a rapidly changing load.

• Proceedings of the KIPE Conference
• /
• 2012.07a
• /
• pp.195-196
• /
• 2012

In recent years, in an effort to improve the efficiency and the power density of the front-end power factor correction(PFC), the interleaving of multiple converter is employed. The conventional interleaved continuous conduction mode(CCM) boost PFC converter requires input and output voltage sensing and three current sensing to obtain current balancing between modules. In this paper, the interleaved CCM PFC converter based on modulated carrier control is proposed. With the proposed method, two phase interleaved PFC can be realized simply without line voltage sensing resistor and can achieve current balancing without additional current sensing resistor on common return path. The simulation studies are carried out to verify the effectiveness of the proposed control scheme.

• Journal of Power Electronics
• /
• v.4 no.1
• /
• pp.18-27
• /
• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.961_962
• /
• 2009

A novel, two-inductor, interleaved power-factor-corrected (PFC) boost converter that exhibits voltage-doubler characteristic when it operates with a duty cycle greater than 0.5 is introduced. The voltage-doubler characteristic of the proposed converter makes it quite suitable for universal-line (90~265VRMS) PFC applications. Because the proposed PFC boost rectifier operates as a voltage doubler at low line, its low-line range efficiency is greatly improved compared to that of its conventional counterpart. The performance of the proposed PFC rectifier was evaluated on an experimental 300W PFC prototype.

• Journal of Power Electronics
• /
• v.14 no.5
• /
• pp.815-826
• /
• 2014

An improved bridgeless interleaved boost power factor correction (PFC) rectifier to improve power efficiency and component utilization is proposed in this study. With combined conventional bridgeless PFC circuit and interleaved technology, the proposed rectifier consists of two interleaved and magnetic inter-coupling boost bridgeless converter cells. Each cell operates alternatively in the critical conduction mode, which can achieve the soft-switching characteristics of the switches and increase power capacity. Auxiliary blocking diodes are employed to eliminate undesired circulating loops and reduce current-sensing noise, which are among the serious drawbacks of a dual-boost PFC rectifier. Magnetic component utilization is improved by symmetrically coupling two inductors on a unique core, which can achieve independence from each other based on the auxiliary diodes. Through the interleaved approach, each switch can operate in the whole line cycle. A simple control scheme is employed in the circuit by using a conventional interleaved controller. The operation principle and theoretical analysis of the converter are presented. A 600 W experimental prototype is built to verify the theoretical analysis and feasibility of the proposed rectifier. System efficiency reaches 97.3% with low total harmonic distortion at full load.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.26 no.1
• /
• pp.53-58
• /
• 2021

Operation of the interleaved Boost PFC converter in Critical Conduction Mode (CrM) shows the advantages of high efficiency and good EMI characteristics owing to the valley switching of FET. However, when it is designed for a highly pulsating load, operation at a relatively high frequency is inevitable at non-pulsating typical load condition, resulting in efficiency degradation. Moreover, the physical size of the inductor becomes problematic because of the nature of the CrM operation, where the inductor peak current is about two times the inductor average current, thereby requiring high DC-bias characteristics, which is worse when the output power is high. In this study, a new parallel driving method of two sets of interleaved boost PFC converters for highly pulsating high-power application is proposed. The proposed method does not require any additional load-sharing controller, resulting in high efficiency and smaller inductor size.

• Proceedings of the KIPE Conference
• /
• 1998.07a
• /
• pp.401-404
• /
• 1998

This paper proposes a new soft switching single stage AC/DC full bridge converter with unit power factor and isolated output. This circuit shows that it is possible to combine the boost converter which is for PFC(Power Factor Correction) and full bridge converter which is for DC/DC converter. A simple auxiliary circuit which includes neither lossy components nor active switches eliminates ringing of secondary side of the transformer. The characteristics of the proposed circuit are investigated and the validity is verified by the simulation results.

• Proceedings of the KIEE Conference
• /
• 2004.10a
• /
• pp.160-163
• /
• 2004

A passive lossless turn-on/turn-off snubber network is proposed for the boost PWM converter. Previous AC/DC PFC Boost Converter perceives feed forward signal of output for average current-mode control. Previous Boost Convertor, the Quantity of input current will be decreased by the decrease of output current in light load, and also Power factor comes to be decreased. Also the efficiency of converter will be decreased by the decrease of power factor. The proposed converter presents the good PFC, low line current harmonic distortions and tight output voltage regulations using energy recovery circuit. All of the semiconductor devices in the converter are turned on under exact or near zero voltage switching(ZVS). No additional voltage and current stresses on the main switch and main diode occur. To show the superiority of this converter is verified through the experiment with a 640W, 100kHz prototype converter.

• Journal of Power Electronics
• /
• v.5 no.3
• /
• pp.212-217
• /
• 2005

In order to correct the power boost topology has been used for easy control. But conventional boost topology has the following drawbacks: switching voltage surge, cross conduction current and right-half-plane zero of its control transfer function. Furthermore, in this topology the output voltage is always higher than the input voltage. As a result, a first-stage boost PFC converter needs to be connected with a second-stage DC-DC converter. A new topology which can be used as single stage PFC converter is proposed in this paper.