• Title/Summary/Keyword: PDP electrode

Search Result 228, Processing Time 0.029 seconds

Preparation of Lead-free Silver Paste with Nanoparticles for Electrode (나노입자를 첨가한 전극용 무연 silver 페이스트의 제조)

  • Park, Sung Hyun;Park, Keun Ju;Jang, Woo Yang;Lee, Jong Kook
    • Journal of the Korean Society for Heat Treatment
    • /
    • v.19 no.4
    • /
    • pp.219-224
    • /
    • 2006
  • Silver paste with low sintered temperature has been developed in order to apply electronic parts, such as bus electrode, address electrode in PDP (Plasma Display Panel) with large screen area. In this study, nano-sized silver particles with 10-30 nm were synthesized from silver nitrate ($AgNO_3$) solution by chemical reduction method and silver paste with low sintered temperature was prepared by mixing silver nanoparticles, conventional silver powder with the particle size 1.6 um and Pb-free frit. Conductive thick film from silver paste was fabricated by screen printing on alumina substrate. After firing at $540^{\circ}C$, the cross section and surface morphology of the thick films were analyzed by FE-SEM. Also, the sheet resistivity of the fired thick films was measured using the four-point technique.

DC Magnetron Sputtering of Cr/Cu/Cr Metal Electrodes for AC Plasma Display panel (DC Magnetron Sputtering 법에 의한 AC Plasma Display panel의 Cr/Cu/Cr 금속전극 제조)

  • 남대현;이경우;박종완
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.13 no.8
    • /
    • pp.704-710
    • /
    • 2000
  • Metal electrode materials for plasma display panel should have low electrical resistivity in order to maintain stable gas discharge and have fast response time. They should also hae good film uniformity adhesion and thermal stability. In this study Cr/Cu/Cr metal electrode structure is formed by DC magnetron sputtering. Cr and Cu films were deposited on ITO coated glasses with various DC power density and main pressures as the major parameters. After metal electrodes were formed a heat treatment was followed at 55$0^{\circ}C$ for 20 min in a vacuum furnace. The intrinsic stress of the sputtered Cr film passed a tensile stress maximum decreased and then became compressive with further increasing DC power density. Also with increasing the main pressure stress turned from compression to tension. After heat the treatment the electrical resistivity of the sputtered Cu film of 2${\mu}{\textrm}{m}$ in thickness prepared at 1 motor with the applied power density of 3.70 W/cm$^2$was 2.68 $\mu$$\Omega$.cm With increasing the main pressure the DC magnetron sputtered Cu film became more open structure. The heat treatment decreased the surface roughness of the sputtered Cr/Cu/Cr metal electrodes.

  • PDF

Discharge Characteristics of Logic Gate for Discharge Logic Gate Plasma Display Panel (방전 논리게이트 플라즈마 디스플레이 패널의 논리게이트 방전특성)

  • Ryeom, Jeong-Duk
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.19 no.6
    • /
    • pp.9-15
    • /
    • 2005
  • In this research the discharge characteristics of logic gate of the discharge logic gate plasma display panel with the NOT-AND logic function newly designed was analyzed. As for this discharge logic gate a logical output is induced by controlling the voltage between the electrodes using the discharge path. From the experimental result the discharge characteristics of logic gate is influenced by the interrelation of the voltages appling two vertical electrodes. To in the application possibility to large screen PDP, the discharge characteristics by the line resistance of the electrode was evaluated In result it has been inferred that the influence which the drop of voltage by the line resistance of two vertical electrodes exerts on the discharge of the logic gate is minute. Through the experiment, the optimized values of the pulse voltages and the current limitation resistances of each electrode which composed the discharge logic gate were obtained and maximum operation margin of 49[V] was obtained.

The Delay-Time Characteristics of DC Discharge in the Discharge Logic Gate Plasma Display Panel (방전논리게이트 플라즈마 디스플레이 패널의 직류방전 지연특성)

  • Ryeom, Jeong-Duk;Kwak, Hee-Ro
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.21 no.1
    • /
    • pp.28-34
    • /
    • 2007
  • In this research, the characteristics of the DC discharge that was the logical gate input of discharge logic gate PDP newly proposed was considered. The logical output is induced by controlling the potential difference of inter-electrode according to the discharge path in the discharge logic gate. From the experimental result the discharge time lag was shortened to 1/3 and the voltage has decreased to 1/2 in the case to apply priming discharge for improving stability of these DC discharges compared with the case when it is not applied. Moreover, after the priming discharge ends, the space charge generated by this discharge influences it up to about $30[{\mu}s]$. And, as a measured result of the influence that the space charge exerts on the DC discharge with the change in time and spatial distance, it has been understood that there is a possibility that going away spatially can slip out the influence of the discharge easily as for going away from the discharge time-wise. Therefore the conclusion that the discharge logic gates of each scanning electrode can be operated independently is obtained.

Improvement of Address Discharge Characteristics Using Wall Charge on Common Electrodes in AC PDP (플라즈마 디스플레이 패널에서 공통전극에서의 벽전하를 이용한 기입방전특성의 향상)

  • Cho, Byung-Gwon
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.3
    • /
    • pp.174-178
    • /
    • 2013
  • A modified driving waveform is proposed to improve the address discharge characteristics using wall charge on the common electrodes in plasma display panel. In the driving scheme of plasma display, after a reset period, the negative charge are accumulated on two front electrodes and positive wall charge are accumulated on the address electrode. As the address discharge during an address period is produced when the scan and address pulses are applied at the same time, negative charge on the scan electrodes and positive charge on the address electrodes are mainly used. On the other hand, as the voltage are only maintained without applying the waveform during an address period on the common electrodes, the wall charge is not used on the common electrodes. In this paper, the address discharge characteristics are investigated with changing pulse applying time and applied voltage amplitude on the common electrodes and consequently the producing time of an address discharge are shortened about 200 ns compared with the conventional driving waveform.

Scanning Backlight Driver for Mercury Free Flat Fluorescent Lamp (무수은 면광원 램프용 Scanning Backlight 구동회로)

  • Oh, Eun-Tae;Jung, Yong-Min;Lee, Kyung-In;Yoo, Ho-Won;Lee, Jun-Young
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.14 no.1
    • /
    • pp.8-14
    • /
    • 2009
  • A lamp which is currently employed to LCD(Liquid Crystal Display) Backlight is almost CCFL(Cold Cathod Fluorescent Lamp) and EEFL(External Electrode Fluorescent Lamp). However, the use of these lamps is being restricted as RoHS(the Restriction of the use of certain Hazardous Substances in electrical and electronic equipment) regulation is gradually reinforced. According to this situation, the manufacturing of a lamp which doesn't use mercury is unescapable. Moreover, LCD TV has a defect which take place Motion Blur phenomenon due to response time of LC(Liquid Crystal), and Hold-type characteristic which only exists in LCD differently to CRT, PDP. In this paper, an inverter is proposed to drive a plane light source lamp which is not containing mercury. Driving circuit of proposed inverter is simple because the number of semiconductor device and magnetic device is reduced by using forward topology. Also, Motion Blur phenomenon is decreased by dividing the plane light source lamp to six block along vertical direction, and scanning. Finally, we proved usefulness of proposed inverter through experiment.

Wall Charge Measurement in the Address Period of AC Plasma Display Panel

  • Kim, Dong-Hyun;Lee, Sung-Hyun;Kim, Young-Dae;Park, Jung-Tae;Lee, Gi-Bum;Lee, Jae-Young;Ryu, Jae-Hwa;Park, Chung-Hoo
    • Journal of Information Display
    • /
    • v.1 no.1
    • /
    • pp.42-47
    • /
    • 2000
  • The relationship between driving voltage and the amount of wall charge in the address period of surface discharge type AC Plasma Display Panel has been investigated. The amount of wall charge on each electrode is obtained simultaneously from the current profiles after applying only one addressing discharge pulse. The wall charge $Q_y$ on the scan electrode Y is almost the sum of $Q_x$ on the address electrode X and $Q_z$ on the sustain electrode Z. The $Q_y$ increased with the driving voltage regardless of the kind of electrode, whereas the addressing $T_d$ decreased. The $Q_x$ and $Q_y$ are increased considerably by blocking voltage $V_z$, whereas $Q_x$ is decreased. The $V_z$ dependence of $Q_x$ $Q_y$ and ${\varrho}_z$ in addressing discharge was $-13{\times}10^{-2}$ (pc/$V_z$), and $60{\times}10^{-2}$ ($pc/V_z$) and $70{\times}10^{-2}(pc/V_z)$, respectively.

  • PDF

Compensation of Addressing Time at High Temperature in ac PDP.

  • Choi, Joon-Young;An, Jung-Soo;Kim, Hun-Hee;Lee, Ho-Jun;Lee, Hea-Jun;Kim, Dong-Hyun;Park, Chung-Hoo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2004.08a
    • /
    • pp.164-170
    • /
    • 2004
  • Misfiring is often observed during the high temperature quality assurance test of plasma display panel. This limits the productivity of PDP industry. In this paper, experimental observations on the misfiring at high panel temperature have been performed through time dependent discharge light output and static margin measurement. For the high temperature condition, firing voltage increment is found in both surface and facing discharges. This in turn increases time lag in address discharge, and results in increment of misfiring probability. In order to reduce this kind of misfiring, a new method that applies automatically different slope of ramp erasing pulse on the common electrode according to temperature variation is proposed. The experimental results show that controlling the slope of ramp erasing pulse is quite effective for compensating temperature-dependent variation of reset and address discharge.

  • PDF

Electro-optical characteristic of a AC-PDP with closed type slant electrode (폐쇄형으로 제작된 경사형 대향유지전극구조 AC-PDP의 전기-광학적 특성)

  • Lim, Jung-Hwan;Cho, Hyun-Min;Ok, Jung-Woo;Lee, Hae-June;Kim, Dong-Hyun;Lee, Ho-Jun;Park, Chung-Hoo
    • Proceedings of the KIEE Conference
    • /
    • 2008.07a
    • /
    • pp.1307-1308
    • /
    • 2008
  • 본 연구에서는 이전에 제안한 stripe형으로 제작된 경사형 대향유지전극구조의 마진 개선과 오방전 감소를 위하여 폐쇄형으로 제작된 경사형 대향유지전극구조를 제안하였다. 제안된 구조는 상판의 유지전극들을 페쇄형으로 패터닝된 유전체층 사이에 Ag 전극을 경사형으로 형성하여 만든 구조이다. 테스트 패널은 250${\mu}m$ 유지전극 간격들을 가지는 제안된 구조와 기존의 유지전극 간격 60${\mu}m$의 ITO 구조를 reference로 하여 제작하였다. 폐쇄형 구조를 reference를 기준으로 이전의 stripe형과 비교했을때 전류가 50${\sim}$64% 증가하여 효율이 18% 감소하였지만 마진이 25V 증가하였고 휘도가 최대 44% 증가하였다. 패쇄형 구조가 stripe형 구조에 비해 효율이 감소하였지만 기존의 면방전형 구조에 비해 최대 146%의 효율 증가를 보였으며 동일전압에서 stripe 구조에 비해 높은 휘도와 넓어진 마진을 가졌다.

  • PDF

The Property Change of ITO Prepared by Reactive R.F. Sputtering in POP manufacturing Process (반응성 스퍼트링으로 형성된 ITO의 유전채 소성에 따른 특성변화)

  • Nam, Sang-Ok;Chi, Sung-Won;Sohn, Je-Bong;Huh, Keun-Do;Cho, Jung-Soo;Park, Chung-Hoo
    • Proceedings of the KIEE Conference
    • /
    • 1997.07d
    • /
    • pp.1411-1413
    • /
    • 1997
  • The thin film that is electrically conductive and optically transparent is called conductive transparent thin film. ITO(Indium-Tin Oxide) which is a kind of conductive transparent thin film has been widely used in solar cell, transparent electrical heater, selective optical filter, FDP(Flat Display Panel) such as LCD (Liquid Crystal Display), PDP(Plasma Display Panel) and so on. Especially in PDP, ITO films is used as a transparent electrode in order to maintain discharge and decrease consumption power through the improvement of cell structure. In this study, we prepared ITO by reactive r.f. sputtering with indium-tin(Sn wt 10%) alloy target instead of indium-tin oxide target. The ITO films deposited at low temperature $150^{\circ}C$ and 8% $O_2$ partial pressure showed about $3.6{\Omega}/{\square}$. At the end of firing, the resistance of ITO was decreased, the optical transparence was improved above 90%.

  • PDF