• 한국결정성장학회지
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• 제9권2호
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• pp.212-216
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• 1999

SiC(3C) 광다이오드는 p-형 Si 위에 tetramethylsilane (TMS)를 열분해아여 화학기상증착법으로 성장된 SiC(3C) 에피층을 성장하여 제작되었다. SiC(3C)의 전기적 특성은 홀 측정(Hall measurement) 및 전류-전압(I-V) 특성으로 조사되었다. SiC(3C) 에피층의 전도형은 n-형이었다. 저항성 접촉은 마스크 (shadow-mask)를 통해서 Al을 열증착하여 형성하였다. SiC(3C)광다이오드의 광학적 이득(photovoltaic detection)를 해석하기 위하여 SiC(3C) 에피층의 Spectral response (SR)를 전기적 변수(electrical parameter) 및 광다이오드의 기하학적 구조(geometric structure)를 고려하여 계산하였다. 적절히 선정된 변수들로부터 계산된 SR의 최대값은 550 nm에서 약 0.75이었고, 파장영역 400~600 nm 사이에서 청색 및 근자외선 광검지기로서 매우 유용하다.

• 한국전기전자재료학회논문지
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• 제21권12호
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• pp.1083-1089
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• 2008

We studied the dielectric characteristics of low-k SiOCH thin films by Ellipsometry. The SiOCH thin films were prepared by deposition of BTMSM precursors on p-Si wafer by CCP-PECVD method. The nano-porous structural organic/inorganic hybrid-type of SiOCH thin films correlated directly to the formation of low dielectrics close to pore(k=1). The structural groups including highly dense pores in SiOCH thin films originated the anisotropic geometry type of network structure directing to complex refractive characteristics of SiOCH single layer on the p-Si wafer. The linearly polarized beam of Xe-ramp in the range from 190 nm to 2100 nm introduced to the surface of SiOCH thin film, and the reflected beam was Elliptically polarized by complex refractive coefficients of SiOCH dipole groups. The amplitude variation $\Psi$ and phase variation $\Delta$ of the relative reflective coefficients between perpendicular and parallel components to the incident plane were measured by Ellipsometry. The complex optical constants n and k as well as the dielectric constant and thickness of SiOCH thin films were driven by the measured value of $\Psi$ and $\Delta$.

• Journal of Magnetics
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• 제12권4호
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• pp.144-148
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• 2007

We report on the observation of p-type conductivity and ferromagnetism in diluted magnetic semiconductor $(Zn_{0.97}Mg_{0.01}Mn_{0.02})O:P$ films grown on $SiO_2/Si$ substrates by pulsed laser deposition. The p-type conduction with hole concentration over $10^{18}cm^{-3}$ is obtained by codoping of Mg and P followed by rapid thermal annealing in an $O_2$ atmosphere. Structural and compositional analyses for the p-type $(Zn_{0.97}Mg_{0.01}Mn_{0.02})O:P$ films annealed at $800^{\circ}C$ indicates that highly c-axis oriented homogeneous films were grown without any detectable formation of secondary phases. The films were found to be transparent in the visible range. The magnetic measurements clearly revealed an enhancement of room temperature ferromagnetism by p-type doping.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2006년도 춘계학술대회
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• pp.214-217
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• 2006

p-type 비정질 실리콘 에미터와 n-type 실리콘 기판의 계면에 intrinsic 비정질 실리콘을 증착함으로써 계면의 재결합을 억제하여 20%가 넘는 효율을 보이는 이종접합 태양전지가 Sanyo에 의해 처음 제시된 후 intrinsic layer에 대한 연구가 많이 진행되어 왔다. 하지만 p-type wafer의 경우는 n-type에 비해 intrinsic buffer의 효과가 미미하거나 오히려 특성을 저하시킨다는 보고가 있으며 그 이유로는 minority carrier에 대한 barrier가 상대적으로 낮다는 것과 partial epitaxy가 발생하기 때문으로 알려져 있다. 본 연구에서는 partial epitaxy를 억제하기 위한 방법으로 증착 온도를 낮추고 QSSPC를 사용하여 minority carrier lifetime을 측정함으로써 각 온도에 따른 passivation 특성을 평가하였다. 또한 SiH4에 H2를 섞어서 증착하였을 경우 각 dilution ratio(H2 flow/SiH4 flow)에서의 passivation 특성 또한 평가하였다. 기판 온도 $100^{\circ}C$에서 증착된 샘플의 lifetime이 가장 길었으며 그 이하와 이상에서는 lifetime이 감소하는 경향을 보였다 낮은 온도에서는 박막 자체의 결함이 증가하였기 때문이며 높은 온도에서는 partial epitaxy의 영향으로 추정된다. H2 dilution을 하여 증착한 샘플의 경우 SiH4만 가지고 증착한 샘플보다 훨씬 높은 lifetime을 가졌다 이 또한 박막 FT-IR결과로부터 H2 dilution을 한 경우 compact한 박막이 형성되는 것을 확인할 수 있었는데 radical mobility 증가에 의한 박막 특성 향상이 원인으로 생각된다.

• 한국세라믹학회지
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• 제36권9호
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• pp.937-945
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• 1999

반응결합 탄화규소(RBSC) 반응관을 보호하기 위하여, 반응결합 탄화규소 기판 위에 탄화규소를 1~10 범위의 입력기체비(${\alpha}=P_{H2}/P_{MTS}=Q_{H2}/Q_{MTS}$)와 1050~1300$^{\circ}C$범위의 증착온도에서 methyltrichlorosilane(MTS)로부터 수소분위기에서 저압화학기상법으로 증착하였다. 1250$^{\circ}C$의 증착온도에서 입력기체비가 감소함에 따라 증착속도는 증가하다가 감소하였다 입력기체비가 높을 때에는 (111) 우선배향성을 나타내고 과립형의 미세구조를 보이며, 입력기체비가 작을 경우에는 (220) 우선배향성을 가지는 마면주상의 미세구조가 관찰되었다. 증착온도가 증가함에 따라 입력기체비와 비슷하게 미세구조의 변화하는결과를 얻었으며, 이러한 결과는 증착기구의 변화와 밀접한 관련이 있다. 일정한 증착온도에서 입력기체비의 조정를 통하여 얻었으며, 이러한 결과는 증착기구의 변화와 밀접한 관련이 있다. 일정한 증착온도에서 입력기체비의 조절을 통하여 과립형과 미면주상의 미세구조를 함께 가지는 복층구조를 연속공정을 통하여 성공적으로 제조하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 제5회 영호남 학술대회 논문집
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• pp.59-62
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• 2003

Our Zn diffusion into n-type $GaAs_{0.60}P_{0.40}$ used ampoule-tube method to increase IV. N-type epitaxial wafers were preferred by $H_2SO_4$-based pre-treatment. $SiO_2$ thin film was deposited by PECVD for some wafers. Diffusion times and diffusion temperatures respectability are 1, 2, 3 hr and 775, $805^{\circ}C$. LED chips were fabricated by the diffused wafers at Fab. The peak wavelength of all chips showed about 625~650 nm and red color. The highest IV is about 270 mcd at the diffusion condition of $775^{\circ}C$, 3h for the wafers which didn't deposit $SiO_2$ thin films. Also, the longer diffusion time is the higher IV for the wafers which deposit $SiO_2$ thin films.

• 한국표면공학회지
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• 제38권3호
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• pp.89-94
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• 2005

We investigate the reaction stability of cobalt and nickel with side-wall materials of $SiO_2\;and\;Si_3N_4$. We deposited 15nm-Co and 15nm-Ni on $SiO_2(200nm)/p-type$ Si(100) and $Si_3N_4(70 nm)/p-type$ Si(100). The samples were annealed at the temperatures of $700\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The sheet resistance, shape, and composition of the residual materials were investigated with a 4-points probe, a field emission scanning electron microscopy, and an AES depth profiling, respectively. Samples of annealed above $1000^{\circ}C$ showed the agglomeration of residual metals with maze shape and revealed extremely high sheet resistance. The Auger depth profiling showed that the $SiO_2$ substrates had no residual metallic scums after $H_2SO_4$ cleaning while $Si_3N_4$ substrates showed some metallic residuals. Therefore, the $SiO_2$ spacer may be appropriate than $Si_3N_4$ for newly proposed Co/Ni composite salicide process.

• 태양에너지
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• 제6권2호
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• pp.70-75
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• 1986

The fabrication procedure and characteristics of $Ta_2O_5/Al/SiO_2/p-Si$ MIS solar cells forming a fine grating pattern of aluminum evaporated on to p-type silicon crystal are discribed. The proper temperature for oxide growing of these cells was found to be about $450^{\circ}C$ for 20 minutes with oxygen flow. The conversion efficiency increased about 3% after $750{\AA}$ thickness of tantalium silica film spin on anti-reflective coating. The best results showed that $V_{oc}=0.545V,\;J_{sc}=34mA$ and F.F = 0.65, which represent that the conversion efficiency is 12%.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.847-853
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• 2016

Applications of Si have been increasingly exploited and extended to More-Moore, More-than-Moore, and beyond-CMOS approaches. Ge is regarded as one of the supplements for Si owing to its higher carrier mobilities and peculiar band structure, facilitating both advanced and optical applications. As an emerging metal-oxide device, the junctionless field-effect transistor (JLFET) has drawn considerable attention because of its simple process, less performance fluctuation, and stronger immunity against short-channel effects due to the absence of anisotype junctions. In this study, we investigated lateral field scalability, which is equivalent to channel-length scaling, in Si and Ge JLFETs. Through this, we can determine the usability of Si CMOS and hypothesize its replacement by Ge. For simulations with high accuracy, we performed rigorous modeling for ${\mu}_n$ and ${\mu}_p$ of Ge, which has seldom been reported. Although Ge has much higher ${\mu}_n$ and ${\mu}_p$ than Si, its saturation velocity ($v_{sat}$) is a more determining factor for maximum $I_{on}$. Thus, there is still room for pushing More-Moore technology because Si and Ge have a slight difference in $v_{sat}$. We compared both p- and n-type JLFETs in terms of $I_{on}$, $I_{off}$, $I_{on}/I_{off}$, and swing with the same channel doping and channel length/thickness. $I_{on}/I_{off}$ is inherently low for Ge but is invariant with $V_{DS}$. It is estimated that More-Moore approach can be further driven if Si is mounted on a JLFET until Ge has a strong possibility to replace Si for both p- and n-type devices for ultra-low-power applications.

• 한국분말재료학회지
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• 제14권4호
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• pp.272-276
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• 2007

P-type thermoelectric material $Si_{0.8}Ge_{0.2}$ was sintered by Hot Press process (HP) and the effect of boron ($0.25{\sim}2$ at%) addition on the thermoelectric properties were reported. To enhance the thermoelectric performances, the $Si_{0.8}Ge_{0.2}$, alloys were fabricated by mechanical alloying (MA) and HP. The carrier of p-type SiGe alloy was controlled by B-doping. The effect of sintering condition and thermoelectric properties were investigated. B-doped SiGe alloys exhibited positive seebeck coefficient. The electrical conductivity and thermal conductivity were increased at the small amount of boron content ($0.25{\sim}0.5$ at%). However, they were decreased over 0.5 at% boron content. As a result, the small addition of boron improved the Z value. The Z value of 0.5 at% B doped $Si_{0.8}Ge_{0.2}$ B alloy was $0.9{\times}10{-4}/K$, the highest value among the prepared alloys.