• Title/Summary/Keyword: Oxide-semiconductor

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Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2

  • Jo, Yoo Jin;Moon, Jeong Hyun;Seok, Ogyun;Bahng, Wook;Park, Tae Joo;Ha, Min-Woo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.265-270
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    • 2017
  • 4H-SiC has attracted attention for high-power and high-temperature metal-oxide-semiconductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above $1000^{\circ}C$, thermal oxidation initiates $SiO_2$ layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown $SiO_2$ on 4H-SiC is limited by high oxide charges due to carbon clusters at the $SiC/SiO_2$ interface and near-interface states in $SiO_2$; this can be resolved via low-temperature deposition. In this study, low-temperature $SiO_2$ deposition on a Si substrate was optimized for $SiO_2/4H-SiC$ MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The $SiO_2/4H-SiC$ MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.

Ink-Jet Printed Oxide Semiconductor Transistors

  • Jeong, Young-Min;Kim, Dong-Jo;Moon, Joo-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.806-808
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    • 2008
  • We studied ink-jet printing for selective deposition of soluble oxide semiconductor to fabricate transistor. Sol-gel derived ZTO solution was synthesized for ink-jet printable solution. Transistors were produced by printing oxide layer between ITO electrodes. We demonstrated that ink-jet printed ZTO transistors work well and surface treatment significantly influences device performance.

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Modeling of Electrolyte Thermal Noise in Electrolyte-Oxide-Semiconductor Field-Effect Transistors

  • Park, Chan Hyeong;Chung, In-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.1
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    • pp.106-111
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    • 2016
  • Thermal noise generated in the electrolyte is modeled for the electrolyte-oxide-semiconductor field-effect transistors. Two noise sources contribute to output noise currents. One is the thermal noise generated in the bulk electrolyte region, and the other is the thermal noise from the double-layer region at the electrolyte-oxide interface. By employing two slightly-different equivalent circuits for two noise current sources, the power spectral density of output noise current is calculated. From the modeling and simulated results, the bulk electrolyte thermal noise dominates the double-layer thermal noise. Electrolyte thermal noise are computed for three different concentrations of NaCl electrolyte. The derived formulas give a good agreement with the published experimental data.

Data Retention Time and Electrical Characteristics of Cell Transistor According to STI Materials in 90 nm DRAM

  • Shin, S.H.;Lee, S.H.;Kim, Y.S.;Heo, J.H.;Bae, D.I.;Hong, S.H.;Park, S.H.;Lee, J.W.;Lee, J.G.;Oh, J.H.;Kim, M.S.;Cho, C.H.;Chung, T.Y.;Kim, Ki-Nam
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.2
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    • pp.69-75
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    • 2003
  • Cell transistor and data retention time characteristics were studied in 90 nm design rule 512M-bit DRAM, for the first time. And, the characteristics of cell transistor are investigated for different STI gap-fill materials. HDP oxide with high compressive stress increases the threshold voltage of cell transistor, whereas the P-SOG oxide with small stress decreases the threshold voltage of cell transistor. Stress between silicon and gap-fill oxide material is found to be the major cause of the shift of the cell transistor threshold voltage. If high stress material is used for STI gap fill, channel-doping concentration can be reduced, so that cell junction leakage current is decreased and data retention time is increased.

Electrical Characteristics of Oxide Layer Due to High Temperature Diffusion Process (고온 확산공정에 따른 산화막의 전기적 특성)

  • 홍능표;홍진웅
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.10
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    • pp.451-457
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    • 2003
  • The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

Influence of Nanoporous Oxide Substrate on the Performance of Photoelectrode in Semiconductor-Sensitized Solar Cells

  • Bang, Jin Ho
    • Bulletin of the Korean Chemical Society
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    • v.33 no.12
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    • pp.4063-4068
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    • 2012
  • Oxide substrates in semiconductor-sensitized solar cells (SSSCs) have a great impact on their performance. $TiO_2$ has long been utilized as an oxide substrate, and other alternatives such as ZnO and $SnO_2$ have also been explored due to their superior physical properties over $TiO_2$. In the development of high-performance SSSCs, it is of significant importance to understand the effect of oxides on the electron injection and charge recombination as these two are major factors in dictating solar cell performance. In addition, elucidating the relationship between these two critical processes and solar cell performance in each oxide is critical in building up the basic foundation of SSSCs. In this study, ultrafast pump-probe laser spectroscopy and open-circuit decay analysis were conducted to examine the characteristics of three representative oxides ($TiO_2$, ZnO, and $SnO_2$) in terms of electron injection kinetics and charge recombination, and the implication of results is discussed.

Optical and Electrical Properties of Oxide Multilayers

  • Han, Sangmin;Yu, Jiao Long;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.17 no.4
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    • pp.235-237
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    • 2016
  • Oxide/metal/oxide (OMO) thin films were fabricated using amorphous indium-gallium-zinc-oxide (a-IGZO) and an Ag metal layer on a glass substrate at room temperature. The optical and electrical properties of the a-IGZO/Ag/a-IGZO samples changed systemically depending on the thickness of the Ag layer. The transmittance in the visible range tends to decrease as the Ag thickness increases while the resistivity, carrier concentration, and Hall mobility tend to improve. The a-IGZO/Ag (13 nm)/a-IGZO thin film with the optimum Ag thickness showed an average transmittance (Tav) of 71.7%, resistivity of 6.63 × 10−5 Ω·cm and Hall mobility of 15.22 cm2V−1s−1.

Fabrication of Thin Film Transistors based on Sol-Gel Derived Oxide Semiconductor Layers by Ink-Jet Printing Technology

  • Mun, Ju-Ho;Kim, Dong-Jo;Song, Geun-Gyu;Jeong, Yeong-Min;Gu, Chang-Yeong
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2009.05a
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    • pp.16.1-16.1
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    • 2009
  • We have fabricated solution processed oxide semiconductor active layer for thin film transistors (TFTs). The oxide semiconductor layers were prepared by ink-jet printing the sol-gel precursor solution based on doped-ZnO. Inorganic ZnO-based thin films have drawn significant attention as an active channel layer for TFTs applications alternative to conventional Si-based materials and organic semiconducting materials, due to their wide energy band gap, optical transparency, high mobility, and better stability. However, in spite of such excellent device performances, the fabrication methods of ZnO related oxide active layer involve high cost vacuum processes such as sputtering and pulsed laser deposition. Herein we introduced the ink-jet printing technology to prepare the active layers of oxide semiconductor. Stable sol-gel precursor solutions were obtained by controlling the composition of precursor as well as solvents and stabilizers, and their influences on electrical performance of the transistors were demonstrated by measuring electrical parameters such as off-current, on-current, mobility, and threshold voltage. Microstructure and thermal behavior of the doped ZnO films were investigated by SEM, XRD, and TG/DTA. Furthermore, we studied the influence of the ink-jet printing conditions such as substrate temperature and surface treatment on the microstructure of the ink-jet printed active layers and electrical performance. The mobility value of the device with optimized condition was about 0.1-1.0 $cm^2/Vs$ and the on/off current ratio was about $10^6$. Our investigations demonstrate the feasibility of the ink-jet printed oxide TFTs toward successful application to cost-effective and mass-producible displays.

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Investigation of Uniformity in Ceria based Oxide CMP (Ceria 입자 Oxide CMP에서의 연마 균일도 연구)

  • Lim, Jong-Heun;Lee, Jae-Dong;Hong, Chang-Ki;Cho, Han-Ku;Moon, Joo-Tae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.120-124
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    • 2004
  • 본 연구는 Diluted Ceria 입자를 사용한 $SiO_2$(Oxide) CMP 현상에 대한 내용이다. Ceria Slurry의 경우 Silica Slurry와 비교하였을 때 Oxide Wafer 표면과 축합 화학반응을 일으키며 Chemistry Dominant한 CMP Mechanism을 따르고, Wafer Center Removal Rate(RR) Fast 의 특성을 가진다. Ceria Slurry의 문제점인 연마 불균일도를 해결하기 위해 Tribological System을 이용하였다. CMP Tribology는 Pad-Slurry 유막-Wafer의 System을 가지며 윤활막에 작용하는 마찰계수(COF)가 주요 인자이다. Tribology에 적용되는 Stribeck Curve를 통해 Slurry 윤활막의 두께(h) 정도를 예상할 수 있으며, 이 윤활막의 두께를 조절함으로써 Uniformity 향상이 가능하다. 이 Ceria Slurry CMP의 연마 불균일도를 향상시킬 수 있는 방법으로 pH 조절 및 점도 증가가 있다. Ceria 입자 CMP는 분산액의 pH 변화에 강한 작용을 받게 되며 PH5 근방에서 최적화된 Uniformity가 가능하다. 점도를 증가시키는 경우 유막 h가 증가하게 되어 Ceria Slurry의 유동이 균일 분포 상태에 가까워지며 Wafer Uniformity 향상이 가능하다.

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Study on the Seasoning Effect for Amorphous In-Ga-Zn-O Thin Film Transistors with Soluble Hybrid Passivation

  • Yun, Su-Bok;Kim, Du-Hyeon;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.256-256
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    • 2012
  • Oxide semiconductors such as zinc tin oxide (ZTO) or indium gallium zinc oxide (IGZO) have attracted a lot of research interest owing to their high potential for application as thin film transistors (TFTs) [1,2]. However, the instability of oxide TFTs remains as an obstacle to overcome for practical applications to electronic devices. Several studies have reported that the electrical characteristics of ZnO-based transistors are very sensitive to oxygen, hydrogen, and water [3,4,5]. To improve the reliability issue for the amorphous InGaZnO (a-IGZO) thin-film transistor, back channel passivation layer is essential for the long term bias stability. In this study, we investigated the instability of amorphous indium-gallium-zinc-oxide (IGZO) thin film transistors (TFTs) by the back channel contaminations. The effect of back channel contaminations (humidity or oxygen) on oxide transistor is of importance because it might affect the transistor performance. To remove this environmental condition, we performed vacuum seasoning before the deposition of hybrid passivation layer and acquired improved stability. It was found that vacuum seasoning can remove the back channel contamination if a-IGZO film. Therefore, to achieve highly stable oxide TFTs we suggest that adsorbed chemical gas molecules have to be eliminated from the back-channel prior to forming the passivation layers.

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