• Bulletin of the Korean Chemical Society
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• 제35권2호
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• pp.494-500
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• 2014

Indium-doped zinc oxide nanocrystals (IZO NCs), capped with stearic acid (SA) of different sizes, were synthesized using a hot injection method in a noncoordinating solvent 1-octadecene (ODE). The ligand exchange process was employed to modify the surface of IZO NCs by replacing the longer-chain ligand of stearic acid with the shorter-chain ligand of butylamine (BA). It should be noted that the ligand-exchange percentage was observed to be 75%. The change of particle size, morphology, and crystal structures were obtained using a field emission scanning electron microscope (FE-SEM) and X-ray diffraction pattern results. In our study, the 5 nm and 10 nm IZO NCs capped with stearic acid (SA-IZO) were ligand-exchanged with butylamine (BA), and were then spin-coated on a thermal oxide ($SiO_2$) gate insulator to fabricate a thin film transistor (TFT) device. The films were then annealed at various temperatures: $350^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, and $600^{\circ}C$. All samples showed semiconducting behavior and exhibited n-channel TFT. Curing temperature dependent on mobility was observed. Interestingly, mobility decreases with the increasing size of NCs from 5 to 10 nm. Miller-Abrahams hopping formalism was employed to explain the hopping mechanism insight our IZO NC films. By focusing on the effect of size, different curing temperatures, electron coupling, tunneling rate, and inter-NC separation, we found that the decrease in electron mobility for larger NCs was due to smaller electronic coupling.

• 반도체디스플레이기술학회지
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• 제9권1호
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• pp.35-40
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• 2010

We have investigated the effects of hydrogen injection via in-situ gas addition ($O_2$, $H_2$, or $O_2$ + $H_2$ gas) and plasma post-treatment (Ar or Ar + H plasma) on material properties of ZnO that is considered to be as a channel layer in transparent thin film transistors. The variations in the electrical resistivity, optical transmittance and bandgap energy, and crystal quality of ZnO thin films were characterized in terms of the methods and conditions used in hydrogen injection. The resistivity was significantly decreased by injection of hydrogen; approximately $10^6\;{\Omega}cm$ for as-grown, $1.2\;{\times}\;10^2\;{\Omega}cm$ for in-situ with $O_2/H_2\;=\;2/3$ addition, and $0.1\;{\Omega}cm$ after Ar + H plasma treatment of 90 min. The average transmittance of ZnO films measured at a wavelength of 400-700 nm was gradually increased by increasing the post-treatment time in Ar + H plasma. The optical bandgap energy of ZnO films was almost monotonically increased by decreasing the $O_2/H_2$ ratio in in-situ gas addition or by increasing the post-treatment time in Ar + H plasma, while the post-treatment using Ar plasma hardly affected the bandgap energy. The role of hydrogen in ZnO was discussed by considering the creation and annihilation of oxygen vacancies as well as the formation of shallow donors by hydrogen.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.326-329
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• 2009

We investigated the degradation of $In_2O_3-Ga_2O_3$-ZnO (IGZO) thin-film transistors (TFTs), which is promising device for driving circuits of nextgeneration displays. We performed the electronic stress test by applying gate and drain voltage. We discussed the degradation mechanism by thermal analysis and device simulation.

• 전자공학회논문지A
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• 제32A권8호
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• pp.126-132
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• 1995

The electrical stress of short channel polycrystalline silicon (poly-Si) thin film transistor (TFT) has been investigated. The device characteristics of short channel poly-Si TFT with 5$\mu$m channel length has been observed to be significantly degraded such as a large shift in threshold voltage and asymmetric phenomena after the electrical stress. The dominant degradation mechanism in long channel poly-Si TFT's with 10$\mu$m and 20$\mu$m channel length respectively is charage trappling in gate oxide while that in short channel device with 5.mu.m channel length is defect creation in active poly-Si layer. We propose that the increased defect density within depletion region near drain junction due to high electric field which could be evidenced by kink effect, constitutes the important reason for this significant degradation in short channel poly-Si TFT. The proposed model is verified by comparing the amounts of the defect creation and the charge trapping from the strechout voltage.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.63-64
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• 2009

The TFTs have been fabricated with 3 different geometry SID electrodes which have the same channel W/L ratio (W/L = 5) due to constant channel resistance, The 3 samples have different channel widths (350, 150, and $25\;{\mu}m$) and channel lengths (70, 30, and $5\;{\mu}m$) by fixed channel W/L ratio simultaneously on one chip for reliable comparisons. Resultant on-current and field effect mobility are proportional to the channel width, while the subthreshold swing is inversely proportional to the channel width mainly due to the change of contact resistance. These results show that the contact resistance strongly affects the device performances and should be considered in the applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.201-204
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• 2001

In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values, So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of $I_D-V_D$ $I_D-V_G$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.

• 반도체디스플레이기술학회지
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• 제4권4호
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• pp.9-12
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• 2005

Characteristics of ZnO films grown on $Si-SiO_2$ substrates at temperatures of $200\sim400^{\circ}C$ by metalorganic chemical vapor deposition were investigated. The growth rates and mobilities of ZnO films were dependent on growth temperatures. The field-effect mobilities measured in thin-film transistor structure were $15cm^2/Vsec$.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2013년도 춘계학술대회 논문집
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• pp.138-139
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• 2013

본 연구는 ZnO-TFT 소자에 Hf의 첨가에 따른 소자 특성 및 게이트 바이어스 스트레스에 대한 특성에 대해 분석을 하였다. Hf-Zn-O 박막은 Hf의 조성이 증가함에 따라 작아지는 grain size로 인해 TFT 소자의 전계효과 이동도와 게이트 바이어스 스트레스에서의 문턱전압의 변화가 더 커지는 것을 확인하였다. 한편, Hf이 14at% 함유된 HZO-TFT에서는 이동도는 현저히 저하되었지만, 게이트 바이어스 스트레스에서의 문턱전압의 변화가 현저히 개선되는 것을 확인하였는데, 이는 Hf의 조성이 증가함에 따라 비정질화 되어 grain boundaries에 의한 trap의 영향이 줄어든 결과를 확인하였다. 또한, 전계효과 이동도와 소자의 안정성을 확보하기 위해, poly-ZnO와 amorphous-HZO로 구성된 다중층 채널 구조를 이용한 TFT소자에서는 전계효과 이동도과 소자의 안정성이 개선된 결과를 보였다. 이는 채널과 게이트 산화물의 interface charge trap의 감소와 back-channel effect가 감소한 결과임을 확인하였다.

• 한국전기전자재료학회논문지
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• 제22권9호
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• pp.747-750
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• 2009

The TFTs have been fabricated with 3 different geometry SID electrodes which have the same channel W/L ratio (W/L = 5) due to constant channel resistance, The 3 samples have different channel widths (350, 150, and 25 ${\mu}m$) and channel lengths (70, 30, and 5 ${\mu}m$) by fixed channel W/L ratio simultaneously on one chip for reliable comparisons. Resultant on-current and field effect mobility are proportional to the channel width, while the subthreshold swing is inversely proportional to the channel width mainly due to the change of contact resistance. These results show that the contact resistance strongly affects the device performances and should be considered in the applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.201-204
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• 2001

In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values. So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of I$_{D}$-V$_{D}$, I$_{D}$-V$_{G}$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.ristics.