• ETRI Journal
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• v.17 no.2
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• pp.21-30
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• 1995

A new architecture of field programmable gate array for high-speed datapath applications is presented. Its implementation is facilitated by a configurable interconnect technology based on a one-time, two-terminal programmable, very low-impedance anti-fuse and by a configurable logic module optimized for datapath applications. The configurable logic module can effectively implement diverse logic functions including sequential elements such as latches and flip-flops, and arithmetic functions such as one-bit full adder and two-bit comparator. A novel programming architecture is designed for supplying large current through the anti-fuse element, which drops the on-resistance of anti-fuse below $20{\Omega}$. The chip has been fabricated using a $0.8-{\mu}m$ n-well complementary metal oxide semiconductor technology with two layers of metalization.

• Proceedings of KOSOMES biannual meeting
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• 2017.11a
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• pp.159-159
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• 2017

• Journal of Sensor Science and Technology
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• v.18 no.1
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• pp.28-32
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• 2009

Most portable mobile devices employ rechargeable lithium-ion batteries. This lithium-ion battery usually suffers from the possibility of explosion due to heat generation from surrounding atmosphere or internal deficiency during charging or at overuse. To solve these problems, most rechargeable batteries have a built-in protection circuit module (PCM). The resistance of a properly processed $VO_2$ critical temperature sensor (CTS) is changed dramatically at a critical temperature of around $68^{\circ}C$, which can replace some bi-metal, NTC, or PTC sensors embedded in PCM. Such $VO_2$ CTS consumes a very small current at the level of natural discharge. Experimental results showed that this CTS could be applied to a PCM as the PCM could protect the battery while keeping its power consumption at minimum.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05e
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• pp.108-111
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• 2003

The main objective of this paper is to module design and pressure relief test a new type of polymer gapless surge arrester for power distribution line. Metal oxide surge arrester for most electric power system applications, power distribution line and electric train are now being used extensively to protect overvoltage due to lightning. Surge arresters with porcelain housing must not have explosive breakage of the housing to minimize damage to other equipment when subjected to internal high short circuit current. When breakdown of gapless elements in a surge arrester occurs due to flashover, fault short current flows through the arrester and internal pressure of the arrester rises. The pressure rise can usually be limited by fitting a pressure relief diaphragm and transferring the arc from the inside to the outside of the housing. However, there is possibility of porcelain fragmentation caused by the thermal shock, pressure rise, etc. Non-fragmenting of the housing is the most desired way to prevent damage to other equipment. The pressure change which is occurred by flashover become discharge energy. This discharge energy raises to damage arrester housing and arrester housing is dispersed as small fragment. Therefore, the pressure relief design is requested to obstruct housing dispersion.

• Transactions of the Korean hydrogen and new energy society
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• v.21 no.5
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• pp.405-411
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• 2010

A 5kW class SOFC cogeneration system consisted of a hot box part, a cold BOP (balance of plant) part, and a hot water reservoir. The hot box part contained a stack, a fuel reformer, a catalytic combustor, and heat exchangers. A cold BOP part was composed of blowers, pumps, a water trap, and system control units. A 5kW stack was designed to integrate 2 sub-modules. In this paper, the 5kW class SOFC system was operated using 2 short stacks connected in parallel to test the sub-module and the system. A short stack had 15 cells with $15{\times}15 cm^2$ area. When a natural gas was used, the total power was about 1.38 kW at 120A. Because the sub-modules were connected in parallel and current was loaded using a DC load, voltages of sub-modules were same and the currents were distributed according to the resistance of sub-modules. The voltage of the first stack was 11.46 V at 61A and the voltage of the second stack was 11.49V at 59A.

• Journal of the Korean Electrochemical Society
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• v.9 no.4
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• pp.151-157
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• 2006

A two-dimensional numerical model to study the performance of anode-supported flat-tube solid oxide fuel cell (SOFC) far the cross section of the cell in the flow direction of the fuel and air flows is developed. In this model a mass and charge balance, Maxwell-Stefan equation as well as the momentum equation by using, Darcy's law are applied in differential form. The finite element method using FEMLAB commercial software is used for meshing, discritization and solving the system of coupled differential equations. The current density distribution and fuel consumption as well as water production are analyzed. Experimental data is used to verify a predicted voltage-current density and power density versus current density to judge on the model accuracy.

• Korean Journal of Optics and Photonics
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• v.20 no.4
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• pp.236-240
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• 2009

LED modules, based on MCPCB with a hard barrier oxide layer and an improved thermal dissipation property, are presented. Reflecting cups were also formed on the surface of the MCPCB such that optical coupling between neighboring chips was minimized for improving the photon absorption loss. LED chips were directly attached on the MCPCB by using the COB (Chip On Board) scheme. The LED modules showed significantly enhanced light outputs, compared to the LED modules based on conventional MCPCBs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.31-39
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• 2001

W polymetal gate technology for giga bit DRAM are presented. Key module processes for polymetal gate are studied in detail. $W/WN_x/poly-silicon$ adopted for a word line of 256Mbit DRAM has good gate oxide integrity and junction leakage characteristics through full integration, which is comparable to those of conventional $WSi_x$/Poly-silicon gate process. These results undoubtedly show that $W/WN_x/poly-silicon$ is the strongest candidate as a word line for Giga bit DRAM.

• Proceedings of the Materials Research Society of Korea Conference
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• 2005.05a
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• pp.27-27
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• 2005

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.30 no.5
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• pp.208-213
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• 2020

In this research, design optimization was investigated using the finite element analysis and the optimal design technique based on the PQRSM algorithm to minimize the thermal deformation of IGZO oxide in a target module in which IGZO oxide and a copper backplate are bonded to each other. In order to apply the optimal design technique in conjunction with finite element analysis, the x-coordinate of lower supports and upper fixed boards used as design valuables, and the optimal design was performed to minimize the thermal displacement of IGZO materials as the objective function. After the optimization process, the thermal displacement within IGZO oxide could be reduced to 42 % comparing with the initial model. The result is thought to be useful in the industry as it can reduce the thermal deformation of target oxides materials only by changing the position of the subsidiary materials during the bonding process.