• Journal of IKEEE
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• v.25 no.4
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• pp.770-773
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• 2021

In this paper, the retention characteristics of 3D NAND flash memory applied with tapering and ferroelectric (HfO₂) structure were analyzed after programming operation. Electrons trapped in nitride are affected by lateral charge migration over time. It was confirmed that more lateral charge migration occurred in the channel thickened by tapering of the trapped electrons. In addition, the Oxide-Nitride-Ferroelectric (ONF) structure has better lateral charge migration due to polarization, so the change in threshold voltage (V_th) is reduced compared to the Oxide-Nitride-Oxide (ONO) structure.

• Journal of the Korean Vacuum Society
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• v.4 no.S2
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• pp.156-162
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• 1995

For a stimulating neural electrode, the charge density should be as large as possible to provide adequate stimulation of the nervous system while allowing for miniaturization of the electrode. Since iridium oxide is able to produce high charge densities while preventing undesirable reactions due to charge storage, it has become a promising material for neural prostheses. Successful production of stable Ir and Ir oxide films on various substrates now limits the use of this material. Ir was deposited on two differently prepared surface of (mirror finish, passivation) surgical Ti-6AI-4V with several methods. Ion beam mixing of sputter deposited Ir films on passivated Ti-6AI-4V produced stable and good adherent Ir films. It was found that the increase in charge density of pure Ir on continuous cyclingis due to the accumulation of the oxide phase ( associated with a large surface area) in which the valence state of iridium changes and the double-layer capacitance increases. This study also showed that the double layer capacitance is equally or even more responsible for the high charge density of anodically formed Ir oxide.

• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.377-379
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• 1989

Very thin gate oxide(100-300A) MOS capacitor has been fabricated. The effect of series resistance must be calculated and the exact metal-semiconductor work function difference should be obtained to get the fixed oxide charge density exisiting in oxide. Dilute oxidation make sagy to control oxide thickness and reduce fixed oxide charge density. In case of dilute oxidation, fixed oxide charge density depends on oxidation time. If oxide is very thin, the annealing effect is ignored.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.970-973
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• 1999

When the size of the device is decreased, the hot carrier degradation presents a severe problem for long-term device reliability. In this paper we fabricated & tested the 0.26${\mu}{\textrm}{m}$ NMOSFET with wet gate oxide and nitride oxide gate to compare that the characteristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve and charge trapping using the Hp4145 device tester As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially a hot carrier lifetime(nitride oxide gate device satisfied 30years, but the lifetime of wet gate oxide was only 0.1year), variation of Vg, charge to breakdown and charge trapping etc.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.894-897
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• 2006

Spatial distribution of injected electrons and holes is evaluated by using single-junction charge pumping technique in SONOS(Poly-silicon/Oxide/Nitride/Oxide/Silicon) memory cells. Injected electron are limited to length of ONO(Oxide/Nitride/oxide) region in locally ONO stacked cell, while are spread widely along with channel in fully ONO stacked cell. Hot-holes are trapped into the oxide as well as the ONO stack in locally ONO stacked cell.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.186.1-186.1
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• 2014

Graphene, which is a 2-dimensional carbon material, has been attracting much interest due to its unique properties and potential applications. So far, many interesting experimental and theoretical works have been done concerning the electronic properties of graphene on various substrates. Especially, there are many experimental reports about doping in graphene which is caused by interaction between graphene and its supporting substrates. Here, we report the study of charge transfer between graphene and oxide substrates using density functional theory (DFT) calculations. In this study, we have investigated the charge transfer related with graphene considering various oxide substrates such as SiO2(0001) and MgO(111). Details in charge transfer between graphene and oxides are analyzed in terms of charge density difference, band structure and work function.

• Proceeding of EDISON Challenge
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• 2016.03a
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• pp.362-364
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• 2016

본 논문에서는 MOS(Metal Oxide Semiconductor) Capacitor의 산화막내에 다양한 원인에 의해 존재하는 비이상적인 전하들 중 Fixed Oxide Charge가 소자의 문턱전압에 어떤 영향을 주는지 분석했다. 분석한 결과 n+ polysilicon Gate를 가지고, 산화막인 $SiO_2$의 두께가 3nm이고, 도핑농도가 $10^{18}cm^{-2}$인 P형 실리콘 기판으로 이루어진 MOS Capacitor에서 Fixed Oxide Charge Density가 $C/cm^2$ 이상일 때 문턱전압을 0.01V 이상 감소시키고 $C/cm^2$ 이하일 때 문턱전압을 0.01V 이상 증가시켰다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.461-464
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• 1999

This study has been investigated that traps generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The charge state of the traps can easily be changed by application of low voltages after the stress high voltage. These trap generation involve either electron impact ionization processes or high field generation processes. It determined to the relative traps locations inside the oxides ranges from 113.4$\AA$ to 814$\AA$ with capacitor areas of 10$^{-3}$ $\textrm{cm}^2$ . The oxide charge state of traps generated by the stress high voltage contain either a positive or a negative charge.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.453-456
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• 1999

The Si-SiO$_2$interface trap and nitride bulk trap distribution of SONOSFET(polysilicon-oxide-nitride-oxide-semiconductor)NVSM(nonvolatile semiconductor memory) cell were investigated by single charge pumping method. The used device was fabricated by 0.35 7m standard logic fabrication including the ONO cell process. This ONO dielectric thickness is tunnel oxide 24 $\AA$, nitride 74 $\AA$, blocking oxide 25 $\AA$, respectively. Keeping the pulse base level in accumulation and pulsing the surface into inversion with increasing amplitudes, the charge pumping current flow from the single junction. Using the obtained I$_{cp}$-V$_{h}$ curve, the local V$_{t}$ distribution, doping concentration, lateral interface trap distribution and lateral memory trap distribution were extracted. The maximum N$_{it}$($\chi$) of 1.62$\times$10$^{19}$ /cm$^2$were determined.mined.d.

• The KIPS Transactions:PartA
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• v.15A no.4
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• pp.211-216
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• 2008

In this paper we fabricated and measured the $0.26{\mu}m$ NMOSFET with wet gate oxide and nitride oxide gate to compare that the charateristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve, charge trapping, and SILC(Stress Induced Leakage Current) using the HP4145 device tester. As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially hot carrier lifetime(nitride oxide gate device satisfied 30 years, but the lifetime of wet gate oxide was only 0.1 year), variation of Vg, charge to breakdown, electric field simulation and charge trapping etc.