• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.97-98
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• 2006

High current behaviors of the grounded gate extended drain N-type metal-oxide-semiconductor field effects transistor (GG_EDNMOS) electro-static discharge (ESD) protection devices are analyzed. Simulation based contour analyses reveal that combination of BJT operation and deep electron channeling induced by high electron injection gives rise to the 2-nd on-state. Thus, the deep electron channel formation needs to be prevented in order to realize stable and robust ESD protection performance. Based on our analyses, general methodology to avoid the double snapback and to realize stable ESD protection is to be discussed.

• Transactions on Electrical and Electronic Materials
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• v.17 no.6
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• pp.380-382
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• 2016

The mechanism for instability under PBS (positive bias stress) in amorphous SIZO (Si-In-Zn-O) thin-film transistors was investigated by analyzing the charge trapping mechanism. It was found that the bulk traps in the SIZO channel layer and the channel/dielectric interfacial traps are not created during the PBS duration. This result suggests that charge trapping in gate dielectric, and/or in oxide semiconductor bulk, and/or at the channel/dielectric interface is a more dominant mechanism than the creation of defects in the SIZO-TFTs.

• Journal of the Korean Chemical Society
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• v.56 no.5
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• pp.542-547
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• 2012

We have investigated the electronic properties of the oxide film and anodic oxidation mechanism. Iron was oxidized by two reaction pathways depending on pH. The oxide film has showed the electronic properties of n-type semiconductor based on the Mott-Schottky equation.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1586-1589
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• 2009

We investigated the influence of chemical compositions of gallium and indium cations on the performance of solgel derived amorphous gallium indium zinc oxide (a-GIZO) based thin-film transistors (TFTs). Systematical composition study allows us to understand the solutionprocessed a-GIZO TFTs. Understanding of the compositional influence can be utilized for tailoring the solution processed amorphous oxide TFTs for the specific applications.

• Journal of the Semiconductor & Display Technology
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• v.21 no.2
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• pp.74-84
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• 2022

As the semiconductor industry develops, the difficulty of newly required process technology becomes difficult, and the importance of production yield and product reliability increases. As an effort to minimize yield loss in the manufacturing process, interests in the process defect process for facility diagnosis and defect identification are continuously increasing. This research observed the plasma condition changes in the multi oxide/nitride layer deposition (MOLD) process, which is one of the 3D-NAND manufacturing processes through optical emission spectroscopy (OES) and monitored the result of whether the change in plasma characteristics generated in repeated deposition of oxide film and nitride film could directly affect the film. Based on these results, it was confirmed that if a change over a certain period occurs, a change in the plasma characteristics was detected. The change may affect the quality of oxide film, such as the film thickness as well as the interfacial surface roughness when the oxide and nitride thin film deposited by plasma enhenced chemical vapor deposition (PECVD) method.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.86.1-86.1
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• 2015

As the feature size of Si-based semiconductor shrinks to nanometer scale, we are facing to the problems such as short channel effect and leakage current. One of the solutions to cope with those issues is to bring III-V compound semiconductors to the semiconductor structures, because III-V compound semiconductors have much higher carrier mobility than Si. However, introduction of III-V semiconductors to the current Si-based manufacturing process requires great challenge in the development of process integration, since they exhibit totally different physical and chemical properties from Si. For example, epitaxial growth, surface preparation and wet etching of III-V semiconductors have to be optimized for production. In addition, oxidation mechanisms of III-V semiconductors should be elucidated and re-growth of native oxide should be controlled. In this study, surface preparation methods of various III-V compound semiconductors such as GaAs, InAs, and GaSb are introduced in terms of i) how their surfaces are modified after different chemical treatments, ii) how they will be re-oxidized after chemical treatments, and iii) is there any effect of surface orientation on the surface preparation and re-growth of oxide. Surface termination and behaviors on those semiconductors were observed by MIR-FTIR, XPS, ellipsometer, and contact angle measurements. In addition, photoresist stripping process on III-V semiconductor is also studied, because there is a chance that a conventional photoresist stripping process can attack III-V semiconductor surfaces. Based on the Hansen theory various organic solvents such as 1-methyl-2-pyrrolydone, dimethyl sulfoxide, benzyl alcohol, and propylene carbonate, were selected to remove photoresists with and without ion implantation. Although SPM and DIO3 caused etching and/or surface roughening of III-V semiconductor surface, organic solvents could remove I-line photoresist without attack of III-V semiconductor surface. The behavior of photoresist removal depends on the solvent temperature and ion implantation dose.

• Bulletin of the Korean Chemical Society
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• v.23 no.11
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• pp.1519-1523
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• 2002

A procedure for preparing semiconductor/metal nanowire arrays is described, based on a template method which entails electrochemical deposition into nanometer-wide parallel pores of anodic aluminum oxide films on aluminum. Aligned CdS/Co heterostructured nanowires have been prepared by ac electrodeposition in the anodic aluminum oxide templates. By varying the preparation conditions, a variety of CdS/Co nanowire arrays were fabricated, whose dimensional properties could be adjusted.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.6
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• pp.351-359
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• 2015

Next-generation displays should be transparent and flexible as well as having high resolution and frame number. The main factor for active matrix organic light emitting diode and next-generation displays is the development of TFTs (thin-film transistors) with high mobility and large area uniformity. The TFTs used for transparent displays are mainly oxide TFT that has oxide semiconductor as channel layer. Zinc-oxide based substances such as indium-gallium-zinc-oxide has attracted attention in the display industry. In this paper, the mobility improvement of low cost oxide TFT is studied for fast operating next-generation displays by overcoming disadvantages of amorphous silicon TFT that has low mobility and poly silicon TFT that requires expensive equipment for complex process and doping process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.4
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• pp.400-406
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• 2024

Next-generation wide-bandgap semiconductors such as SiC, GaN, and Ga2O3 are being considered as potential replacements for current silicon-based power devices due to their high mobility, larger size, and production of high-quality wafers at a moderate cost. In this study, we investigate the gradual modulation of chemical composition in multi-stacked metal oxide semiconductor thin films to enhance the performance and bias stability of thin-film transistors (TFTs). It demonstrates that adjusting the Ga ratio in the indium gallium oxide (IGO) semiconductor allows for precise control over the threshold voltage and enhances device stability. Moreover, employing multiple deposition techniques addresses the inherent limitations of solution-processed amorphous oxide semiconductor TFTs by mitigating porosity induced by solvent evaporation. It is anticipated that solution-processed indium gallium oxide (IGO) semiconductors, with a Ga ratio exceeding 50%, can be utilized in the production of oxide semiconductors with wide band gaps. These materials hold promise for power electronic applications necessitating high voltage and current capabilities.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.5
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• pp.473-478
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• 2016

In this paper, the MIS(: Metal-Insulator-Semiconductor) Capacitor with the nitrided-oxide by RTP are fabricated to investigate the carrier trap parameters due to avalanche electron injection. Two times turn-around phenomenon of the flatband voltage shift generated by the avalanche injection are observed. This shows that electron trapping occurs in the oxide film at the first stage. As the electron injection increases, the first turn-around occures due to a positive charge in the oxide layer. After further injection, the curves turns around once again by electron captured. Based on the experimental results, the carrier trapping model for system having multi-traps is proposed and is fitting with experimental data in order to determine trap parameter of nitrided-oxide.