• Transactions on Electrical and Electronic Materials
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• v.2 no.3
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• pp.24-27
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• 2001

The end point of oxide chemical mechanical polishing (CMP) have determined by polishing time calculated from removal rate and target thickness of oxide. This study is about control of oxide removal amounts on the shallow trench isolation (STI) patterned wafers using removal rate and thickness of blanket (non-patterned) wafers. At first, it was investigated the removal properties of PETEOS blanket wafers, and then it was compared with the removal properties and the planarization (step height) as a function of polishing time of the specific STI patterned wafers. We found that there is a relationship between the oxide removal amounts of blanket and patterned wafers. We analyzed this relationship, and the post CMP thickness of patterned wafers could be controlled by removal rate and removal target thickness of blanket wafers. As the result of correlation analysis, we confirmed that there was the strong correlation between patterned and blanket wafer (correlation factor: 0.7109). So, we could confirm the repeatability as applying for STI CMP process from the obtained linear formula. As the result of repeatability test, the differences of calculated polishing time and actual polishing time was about 3.48 seconds. If this time is converted into the thickness, then it is from 104 $\AA$ to 167 $\AA$. It is possible to be ignored because process margin is about 1800 $\AA$.

• Korean Journal of Materials Research
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• v.30 no.5
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• pp.239-245
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• 2020

Synthesizing one-dimensional nanostructures of oxide semiconductors is a promising approach to fabricate highefficiency photoelectrodes for hydrogen production from photoelectrochemical (PEC) water splitting. In this work, vertically aligned zinc oxide (ZnO) nanorod arrays are successfully synthesized on fluorine-doped-tin-oxide (FTO) coated glass substrate via seed-mediated hydrothermal synthesis method with the use of a ZnO nanoparticle seed layer, which is formed by thermally oxidizing a sputtered Zn metal thin film. The structural, optical and PEC properties of the ZnO nanorod arrays synthesized at varying levels of Zn sputtering power are examined to reveal that the optimum ZnO nanorod array can be obtained at a sputtering power of 20 W. The photocurrent density and the optimal photocurrent conversion efficiency obtained for the optimum ZnO nanorod array photoanode are 0.13 mA/㎠ and 0.49 %, respectively, at a potential of 0.85 V vs. RHE. These results provide a promising avenue to fabricating earth-abundant ZnO-based photoanodes for PEC water oxidation using facile hydrothermal synthesis.

• Journal of the Korean institute of surface engineering
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• v.54 no.5
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• pp.260-266
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• 2021

Synthesizing low-dimensional structures of oxide semiconductors is a promising approach to fabricate highly efficient gas sensors by means of possible enhancement in surface-to-volume ratios of their sensing materials. In this work, vertically aligned zinc oxide (ZnO) nanorods are successfully synthesized on a transparent glass substrate via seed-mediated hydrothermal synthesis method with the use of a ZnO nanoparticle seed layer, which is formed by thermally oxidizing a sputtered Zn metal film. Structural and optical characterization by x-ray diffraction (XRD), scanning electron microscopy (SEM), and Raman spectroscopy reveals the successful preparation of the ZnO nanorods array of the single hexagonal wurtzite crystalline phase. From gas sensing measurements for the nitrogen dioxide (NO₂) gas, the vertically aligned ZnO nanorod array is observed to have a highly responsive sensitivity to NO₂ gas at relatively low concentrations and operating temperatures, especially showing a high maximum sensitivity to NO₂ at 250 ℃ and a low NO₂ detection limit of 5 ppm in dry air. These results along with a facile fabrication process demonstrate that the ZnO nanorods synthesized on a transparent glass substrate are very promising for low-cost and high-performance NO₂ gas sensors.

• Journal of the Korean institute of surface engineering
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• v.56 no.4
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• pp.219-226
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• 2023

Utilizing low-dimensional structures of oxide semiconductors is a promising approach to fabricate relevant gas sensors by means of potential enhancement in surface-to-volume ratios of their sensing materials. In this work, vertically aligned cupric oxide (CuO) nanorods are successfully synthesized on a transparent glass substrate via seed-mediated hydrothermal synthesis method with the use of a CuO nanoparticle seed layer, which is formed by thermally oxidizing a sputtered Cu metal film. Structural and optical characterization by x-ray diffraction (XRD), scanning electron microscopy (SEM), and Raman spectroscopy reveals the successful preparation of the CuO nanorods array of the single monoclinic tenorite crystalline phase. From gas sensing measurements for the nitrogen monoxide (NO) gas, the vertically aligned CuO nanorod array is observed to have a highly responsive sensitivity to NO gas at relatively low concentrations and operating temperatures, especially showing a high maximum sensitivity to NO at 200 ℃ and a low NO detection limit of 2 ppm in dry air. These results along with a facile fabrication process demonstrate that the CuO nanorods synthesized on a transparent glass substrate are very promising for low-cost and high-performance NO gas sensors.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.10b
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• pp.443-444
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• 2002

The uniformity of field oxide is critical to isolation property of device in STI, so the control of field oxide thickness in STI-CMP becomes enormously important. The loss of field oxide in shallow trench isolation comes mainly from dishing and erosion in STI-CMP. In this paper, the effect of slurries on the dishing was investigated with both blanket and patterned wafers were selected to measure the removal rate, selectivity and dishing amount. Dishing was a strong function of pattern spacing and types of slurries. Dishing was significantly decreased with decreasing pattern spacing for both slurries. Significantly lower dishing with ceria based slurry than with silica based slurry were achieved when narrow pattern spacing were used. Possible dishing mechanism with two different slurries were discussed based on the observed experimental results.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.283.1-283.1
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• 2016

Tin Oxide(SnO2) has been widely investigated as a transparent conducting oxide (TCO) and can be used in optoelectronic devices such as solar cell and flat-panel displays. It would be applicable to fabricating the wide bandgap semiconductor because of its bandgap of 3.6 eV. In addition, SnO2 is commonly used as gas sensors. To fabricate high quality epitaxial SnO2 thin films, a powder sputtering method was used, in contrast to typical sputtering technique with sintered target. Single crystalline sapphire(0001) substrates were used. The samples were prepared with varying the growth parameters such as gas environment and film thickness. Then, the samples were characterized by using X-ray diffraction, scanning electron microscopy, and atomic force microscopy measurements. We found that the strain evolution of the samples was highly affected by gas environment and growth rate, resulted in the delamination under O2 environment.

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.61.1-61
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• 2003

Stoichiometric, uniform, amorphous ZrO$_2$ films with an equivalent oxide thickness of ∼1.5nm and a dielectric constant of ∼18 were deposited by an atomic layer controlled deposition process on silicon for potential application in meta-oxide-semiconductor(MOS) devices. The conduction mechanism is identified as Schottky emission at low electric fields and as Poole-Frenkel emission at high electric fields. the MOS devices showed low leakage current, small hysteresis(〈50mV), and low interface state density(∼2*10e11/cm2eV). Microdiffraction and high-resolution transmission electron microscopy showed a localized monoclinic phase of ${\alpha}$-ZrO$_2$ and an amorphous interfacial ZrSi$\_$x/O$\_$y/ layer which has a correspondign dielectric constant of 11

• Journal of Applied Reliability
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• v.10 no.1
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• pp.65-71
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• 2010

NAND-type SONOS with a separated double-gate FinFET structure (SDF-Fin SONOS) flash memory devices are proposed to reduce the unit cell size of the memory device and increase the memory density in comparison with conventional non volatile memory devices. The proposed memory device consists of a pair of control gates separated along the direction of the Fin width. There are two unique alternative technologies in this study. One is a channel doping method and the other is an oxide thickness variation method, which are used to operate the SDF-Fin SONOS memory device as two-bit. The fabrication processes and the device characteristics are simulated by using technology comuter-adided(TCAD). The simulation results indicate that the charge trap probability depends on the different channel doping concentration and the tunneling oxide thickness. The proposed SDG-Fin SONOS memory devices hold promise for potential application.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.711-714
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• 2008

Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.257-263
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• 2006

New charge pump circuits with low area and high power efficiency are proposed and verified in this paper. These pump circuits do not suffer the voltage stress higher than $V_{DD}$ across their pumping capacitors. Thus they can use the thin-oxide MOSFETs as the pumping capacitors. Using the thin-oxide capacitors can reduce the area of charge pumps greatly while keeping their driving capability. Comparing the new pump (NCP-2) with the conventional pump circuit using the thick-oxide capacitors shows that the power efficiency of NCP-2 is the same with the conventional one but the area efficiency of NCP-2 is improved as much as 71.8% over the conventional one, when the $V_{PP}/V_{DD}$ ratio is 3.5 and $V_{DD}$=1.8V.