• Korean Journal of Materials Research
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• v.23 no.9
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• pp.477-482
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• 2013

We investigated the detection properties of nitrogen monoxide (NO) gas using transparent p-type $CuAlO_2$ thin film gas sensors. The $CuAlO_2$ film was fabricated on an indium tin oxide (ITO)/glass substrate by pulsed laser deposition (PLD), and then the transparent p-type $CuAlO_2$ active layer was formed by annealing. Structural and optical characterizations revealed that the transparent p-type $CuAlO_2$ layer with a thickness of around 200 nm had a non-crystalline structure, showing a quite flat surface and a high transparency above 65 % in the range of visible light. From the NO gas sensing measurements, it was found that the transparent p-type $CuAlO_2$ thin film gas sensors exhibited the maximum sensitivity to NO gas in dry air at an operating temperature of $180^{\circ}C$. We also found that these $CuAlO_2$ thin film gas sensors showed reversible and reliable electrical resistance-response to NO gas in the operating temperature range. These results indicate that the transparent p-type semiconductor $CuAlO_2$ thin films are very promising for application as sensing materials for gas sensors, in particular, various types of transparent p-n junction gas sensors. Also, these transparent p-type semiconductor $CuAlO_2$ thin films could be combined with an n-type oxide semiconductor to fabricate p-n heterojunction oxide semiconductor gas sensors.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.253-253
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• 2012

Low temperature SiOx film process has being required for both silicon and oxide (IGZO) based low temperature thin film transistor (TFT) for application of flexible display. In recent decades, from low density and high pressure such as capacitively coupled plasma (CCP) type plasma enhanced chemical vapor deposition (PECVD) to the high density plasma and low pressure such as inductively coupled plasma (ICP) and electron cyclotron resonance (ECR) have been used to researching to obtain high quality silicon oxide (SiOx) thin film at low temperature. However, these plasma deposition devices have limitation of controllability of process condition because process parameters of plasma deposition such as RF power, working pressure and gas ratio influence each other on plasma conditions which non-leanly influence depositing thin film. In compared to these plasma deposition devices, neutral beam assisted chemical vapor deposition (NBaCVD) has advantage of independence of control parameters. The energy of neutral beam (NB) can be controlled independently of other process conditions. In this manner, we obtained NB dependent high crystallized intrinsic and doped silicon thin film at low temperature in our another papers. We examine the properties of the low temperature processed silicon oxide thin films which are fabricated by the NBaCVD. NBaCVD deposition system consists of the internal inductively coupled plasma (ICP) antenna and the reflector. Internal ICP antenna generates high density plasma and reflector generates NB by auger recombination of ions at the surface of metal reflector. During deposition of silicon oxide thin film by using the NBaCVD process with a tungsten reflector, the energetic Neutral Beam (NB) that controlled by the reflector bias believed to help surface reaction. Electrical and structural properties of the silicon oxide are changed by the reflector bias, effectively. We measured the breakdown field and structure property of the Si oxide thin film by analysis of I-V, C-V and FTIR measurement.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.63-66
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• 2003

In this paper, the electrical characteristics of single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of poly backseat was researched. The oxide quality was examined through capacitance-voltage characteristics, and besides, it will be describe the capacitance-voltage characteristics of the single oxide layer by semiconductor device simulation.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.328-331
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• 1988

Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.17-19
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• 2004

The electrical properties of gate oxides grown in two different processes, which are in 10% nitrous oxide($N_2O$) and in dry oxygen, have been experimentally investigated and compared. It has been observed that the $SiC-SiO_2$ interface-trap density(Dit) measured in nitrided gate oxide has been tremendously reduced, compared to the density obtained from gate oxide grown in dry oxygen. The beneficial effects of nitridation on gate oxides also have been demonstrated in the values of total near interface-trap density and of forward-bias breakdown field. The reasons of these improvements have been explained.

• Transactions on Electrical and Electronic Materials
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• v.18 no.1
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• pp.13-15
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• 2017

Low emissivity glass for high transparency in the visible range and low emissivity in the IR (infrared) range was fabricated and investigated. The multilayers were have been fabricated, and consisted of two outer oxide layers and a middle layer of Ag as a metal layer. Oxide layers were formed by rf sputtering and metal layers were formed using by an evaporator at room temperature. SiInZnO (SIZO) film was used as an oxide layer. The OMO (oxide-metaloxide) structures of SIZO/Ag/SIZO were analyzed by using transmittance, AFM (atomic force microscopye), and XRD (X-ray diffraction). The OMO multilayer structure was designed to investigate the effect of Ag layer thickness on the optical property of the OMO structure.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.28-32
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• 2023

Recently, the use of stable lithium nanostructures as substrates and electrodes for secondary batteries can be a fundamental alternative to the development of next-generation system semiconductor devices. However, lithium structures pose safety concerns by severely limiting battery life due to the growth of Li dendrites during rapid charge/discharge cycles. Also, enabling long cyclability of high-voltage oxide cathodes is a persistent challenge for all-solid-state batteries, largely because of their poor interfacial stabilities against oxide solid electrolytes. For the development of next-generation system semiconductor devices, solid electrolyte nanostructures, which are used in high-density micro-energy storage devices and avoid the instability of liquid electrolytes, can be promising alternatives for next-generation batteries. Nevertheless, poor lithium ion conductivity and structural defects at room temperature have been pointed out as limitations. In this study, a low-dimensional Graphene Oxide (GO) structure was applied to demonstrate stable operation characteristics based on Li+ ion conductivity and excellent electrochemical performance. The low-dimensional structure of GO-based solid electrolytes can provide an important strategy for stable scalable solid-state power system semiconductor applications at room temperature. The device using uncoated bare NCA delivers a low capacity of 89 mA h g-1, while the cell using GO-coated NCA delivers a high capacity of 158 mA h g−1 and a low polarization. A full Li GO-based device was fabricated to demonstrate the practicality of the modified Li structure using the Li-GO heterointerface. This study promises that the lowdimensional structure of Li-GO can be an effective approach for the stabilization of solid-state power system semiconductor architectures.

• Journal of Sensor Science and Technology
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• v.33 no.1
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• pp.56-61
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• 2024

The quality of the display can be managed by effectively managing the temperature generated by the panel during use. Conventional display panels rely on an external reference resistor for temperature monitoring. However, this approach is easily affected by external factors such as temperature variations from the driving circuit and chips. These variations reduce reliability, causing complicated mounting owing to the external chip, and cannot monitor the individual pixel temperatures. However, this issue can be simply and efficiently addressed by integrating temperature sensors during the display panel manufacturing process. In this study, we fabricated and analyzed a temperature sensor integrated into an a-IGZO (amorphous indium-gallium-zinc-oxide) TFT array that was to precisely monitor temperature and prevent the deterioration of OLED display pixels. The temperature sensor was positioned on top of the oxide TFT. Simultaneously, it worked as a light shield layer, contributing to the reliability of the oxide. The characteristics of the array with integrated temperature sensors were measured and analyzed while adjusting the temperature in real-time. By integrating a temperature sensor into the TFT array, monitoring the temperature of the display became easier and more accurate. This study could contribute to managing the lifetime of the display.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.90.1-90
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• 1998

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.522-529
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• 2013

In this paper, simple but very effective techniques to suppress subthreshold hump effect for high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) technology are presented. Two methods are proposed to suppress subthreshold hump effect using a simple layout modification approach. First, the uniform gate oxide method is based on the concept of an H-shaped gate layout design. Second, the gate work function control method is accomplished by local ion implantation. For our experiments, $0.18{\mu}m$ 20 V class HV CMOS technology is applied for HV MOSFETs fabrication. From the measurements, both proposed methods are very effective for elimination of the inverse narrow width effect (INWE) as well as the subthreshold hump.