• 한국산업융합학회 논문집
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• 제21권6호
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• pp.265-271
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• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.

• 전기학회논문지
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• 제65권12호
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• pp.1979-1985
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• 2016

A protection algorithm using a voltage-controlled overcurrent element for a looped collection circuit in a wind farm is suggested in this paper. Because the proposed algorithm uses voltage relaying signals as well as current relaying signals, any fault in the looped collection circuit can be cleared by voltage-controlled overcurrent relays located at the two adjacent relaying points, the nearest place in each direction from the fault point. The algorithm can also distinguish the external faults which occur at the outside of a wind farm from the internal faults. It means that the proposed algorithm can provide the proper ability of protection coordination to the relays in the looped collection circuits of a large wind farm. The performance of the proposed algorithm is verified under various fault conditions using PSCAD/EMTDC simulations.

• 한국전기전자재료학회논문지
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• 제25권5호
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• pp.340-344
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• 2012

Protected Circuit Module protects battery from over-charge and over-discharge, also prevents accidental explosion. Therefore, power MOSFET is essential to operate as a switch within the module. To reduce power loss of MOSFET, the on state voltage drop should be lowered and the switching time should be shorted. However there is trade-off between the breakdown voltage and the on state voltage drop. The TDMOS can reduce the on state voltage drop. In this paper, effect of design parameter variation on electrical properties of TDMOS, were analyzed by computer simulation. According to the analyzed results, the optimization was performed to get 65% higher breakdown voltage and 17.4% on resistance enhancement.

• 전자공학회논문지 IE
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• 제49권1호
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• pp.18-23
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• 2012

본 논문에서 소형 휴대기기용 DC-DC 변환기를 위한 전압보호회로를 설계 하였다. 제안하는 전압보호회는 저전압 보호회로(UVLO)와 고전압 보호회로(OVP) 로 구성되며, 비교기와 바이어스 회로를 사용하여 구현하였다. XFAB $1{\mu}m$ CMOS 공정을 SPICE 모의실험을 통하여 특성 확인을 하였다. 모의실험 결과, 저전압 보호회로(UVLO)는 입력 전압이 4.8 V 이상이 되면 턴-온 되며, 4.2 V 이하가 되면 턴-오프가 되어 저전압의 입력전압이 인가될 때 회로의 오작동을 막을 수 있다. 고전압 보호회로(OVP)는 기준전압 3.8V 이상의 출력전압이 발생하였을 때 회로를 차단하여 소자의 파괴를 막아 안정성과 신뢰성을 높일 수 있다. 또 가상의 DC-DC 변환기 제어회로에 연결한 결과 전압의 이상에 따른 전압보호회로의 동작여부를 확인하였다. 본 논문에서 제안하는 전압보호회로는 DC-DC 변환기의 보호회로 셀로 유용하게 사용 될 것으로 사료된다.

• 전기전자학회논문지
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• 제24권1호
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• pp.132-139
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• 2020

공기청정기에 사용되는 이오나이저 모듈은 권선형 transformer를 사용하여 방전전극인 HV+/HV-에 3.5KV/-4KV의 고전압을 공급하여 carbon fiber brush의 전계 방사에 의해 양이온과 음이온을 발생시킨다. 기존의 MCU를 이용한 이오나이저 모듈 회로는 PCB 사이즈가 크고 가격이 비싼 단점이 있고, 기존의 ring oscillator를 이용한 게이트 구동 칩은 oscillation 주기가 PVT(Process-Voltage-Temperature) 변동에 민감하고 HV+와 GND, HV-와 GND의 단락에 의한 fault detection 기능이 없으므로 화재나 감전의 위험이 있다. 그래서 본 논문에서는 7bit binary UP counter를 이용하여 PVT 변동이 있더라도 oscillation 주기를 조절하여 HV+ 전압이 목표 전압에 도달하게 한다. 그리고 HV+와 GND 사이의 단락을 검출하기 위한 HV+ short fault detection 회로, HV-와 GND 사이의 단락을 검출하기 위한 HV- short fault detection 회로와 HV+가 과전압 이상으로 올라가는 것을 검출하기 위한 OVP(Over-Voltage Protection) 회로를 새롭게 제안하였다.

• 전력전자학회논문지
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• 제22권4호
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• pp.277-284
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• 2017

For passive power factor correction, the valley fill circuit approach is attractive for low power applications because of low cost, high efficiency, and simple circuit design. However, to vouch for the product quality, two dc-link capacitors in the valley fill circuit should be selected to withstand the peak rectified ac input voltage. The common mode (CM) and differential mode (DM) choke should be used to suppress the electromagnetic interference (EMI) noise, thereby resulting in large size volume product. This paper presents the practical design and implementation of a valley fill flyback converter with reduced dc link capacitors and EMI magnetic volumes. By using the proposed over voltage protection circuit, dc-link capacitors in the valley fill circuit can be selected to withstand half the peak rectified ac input voltage, and the proposed CM/DM choke can be successfully adopted. The proposed circuit effectiveness is shown by simulation and experimentally verified by a 78W prototype.

• 전기학회논문지
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• 제58권8호
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• pp.1538-1543
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• 2009

The electric ballast for ceramic metal halide lamp needs a protection circuit to prevent from over voltage and over current in the case that the lamp or the electric ballast are in faults. In this paper, cost-effective and high performance protection circuit is proposed for the electric ballast. The proposed protection circuit is adapted to the electric ballast with $LC_SC_P$ resonance type half bridge inverter. The experimental results demonstrate that the proposed circuit can protect effectively under open and short fault conditions.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 추계학술대회 논문집
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• pp.227-230
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• 2002

The switching device in an inductive circuit is stressed by the over-voltage at the turn-off time. Thus if the peak value of the over-voltage is not properly limited, the switching device may be broken. Therefore, the snubber circuit should be added to protect the switching device from the over-voltage. The circuit designer must be familiar with the design of the snubber This paper tests the possibility that TVS instead of the conventional snubber can be applied to the protection circuit of the switching device without using the complicated design equations, and shows that the rating of TVS can be easily selected by considering only several parameters of TVS. The experimental results show the reduced switching voltage of the switching device at the turn-off time.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2005년도 춘계학술대회논문집
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• pp.106-110
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• 2005

In this paper, LED traffic signal lamp's operating circuit using Flyback converter and PFC IC has been presented. Most power conversion circuits use PFC IC for Power Factor Correction. The design parameter's value of Flyback converter has been proposed and the error amplifier which regulates the output voltage has been designed Besides, the under voltage protection circuit and the over voltage protection circuit for protecting the operating circuit kin unbalance of common electric power source and the temperature compensation circuit for fixed optical output power have been proposed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.373-376
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• 2001

When varistors for circuit protection is used at high voltage, it's operation properties were unstable because of leakage current and nonlinear coefficient with grain size. For the purpose of improving of ZnO varistor properties, high voltage ZnO varistor was fabricated with Y$_2$O$_3$addition. Electrical properties were investigated according to sintering conditions and mixing conditions. ZnO varistors was shown ohmic Properties when it's applied voltage was below critical voltage. It was shown non-ohmic properties over critical voltage, because current was increased with decreasing resistance.