• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.275-278
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• 1997

We investigated effectness of sort and volume of conductive agent to charge/discharge capacity of LiMn$_2$O$_4$. LiMn$_2$O$_4$is prepared by reacting stoichiometric mixture of LiOH . $H_2O$ and MnO$_2$(mole ratio 1 : 2) and heating at 80$0^{\circ}C$ for 24h, 36h, 48h, 60h and 72h. All LiMn$_2$O$_4$cathode active materials show spinel structure. Cathode active materials calcined at 80$0^{\circ}C$ for 36h, charge/discharge characteristics and cycle stability have remarkable advantages. Used that super-s-black and 20wt% as conductive agent in LiMn$_2$O$_4$, it is excellent than property of cathode used Acetylene black or mixture of Super-s-black and acetylene black at charge/discharge capacity and cycle stability. Also, specific efficiency of cathode is excellent as over 98% and that of first cycle is excellent as 92%.

• Bulletin of the Korean Chemical Society
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• v.17 no.11
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• pp.1061-1065
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• 1996

The charge transfer compounds of tetrathiafulvalene (TTF) with the general formula of (TTF)mMCln, (M=Au, Pt, Ir, Os) were prepared by the direct reaction using excess HAuCl4·3H2O, H2PtCl6·xH2O, H2IrCl6·xH2O and H2OsCl6 respectively. The powdered electrical conductivities (σrt) at room temperature are given as follows; (TTF)3AuCl2, 4.53×10-3; (TTF)3.5AuCl2, 6.37×10-3; (TTF)3PtCl4, 5.51×10-4; (TTF)2IrCl4, 2.40×10-5; (TTF)OsCl4·1/2C2H5OH, 4.46×10-7 Scm-1. Magnetic susceptibility, electronic (UV-Vis.), vibrational (IR) and EPR spectroscopic evidences indicate that there is incomplete charge transfer from the TTF donor to gold, platinum, and iridium respectively, and that there is essentially complete charge transfer to osmium, thereby resulting a relatively low electrical conductivity in osmium compound. The EPR and magnetic susceptibility data reflect that the metals are in diamagnetic Au(Ⅰ), Pt(Ⅱ), Ir(Ⅲ), and Os(Ⅱ) oxidation states, and the odd electrons are extensively delocalized over the TTF lattices in each compound.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.32 no.2
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• pp.133-140
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• 2019

In this paper, the penetration process of Shaped charge jet(SCJ) was simulated through finite element analysis to obtain physical quantities such as jet incidence velocity, penetration rate, and penetration increment. As a result of applying these physical quantities to the hydrodynamic theory, it was confirmed that the penetration efficiency of the jet with a high incident velocity is higher than that of the following slow jet. This efficiency decreased sharply when the jet was slower than the hydrodynamic limit(HL). On the other hand, the comparison of penetration increment and jet consumption over time showed that the length extension effect should be considered for SCJ's theoretical penetration analysis.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.1
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• pp.73-77
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• 2021

Inorganic-organic hybrid perovskite solar cells have demonstrated considerable improvements, reaching 25.5% of certified power conversion efficiency in 2020 from 3.8% in 2009. In normal structured perovskite solar cells, TiO2 electron-transporting materials require heat treatment process at a high temperature over 450℃ to induce crystallinity. Inverted perovskite solar cells have also been studied to exclude the additional thermal process by using [6,6]-phenyl-C61-butyric acid methyl ester (PCBM) as a non-oxide electron-transporting layer. However, the drawback of the PCBM layer is a charge accumulation at the interface between PCBM and a metal electrode. The impact of bathocuproin (BCP) buffer layer on photovoltaic performance has been investigated herein to solve the problem of PCBM. 2-mM BCP-modified perovskite solar cells were observed to exhibit a maximum efficiency of 12.03% compared with BCP-free counterparts (5.82%) due to the suppression of the charge accumulation at the PCBM-Au interface and the resulting reduction of the charge recombination between perovskite and the PCBM layer.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.58-65
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• 2015

This paper presents the design of an implantable stimulation IC intended for neural prosthetic devices using $0.18-{\mu}m$ standard CMOS technology. The proposed single-channel biphasic current stimulator prototype is designed to deliver up to 1 mA of current to the tissue-equivalent $10-k{\Omega}$ load using 12.8-V supply voltage. To utilize only low-voltage standard CMOS transistors in the design, transistor stacking with dynamic gate biasing technique is used for reliable operation at high-voltage. In addition, active charge balancing circuit is used to maintain zero net charge at the stimulation site over the complete stimulation cycle. The area of the total stimulator IC consisting of DAC, current stimulation output driver, level-shifters, digital logic, and active charge balancer is $0.13mm^2$ and is suitable to be applied for multi-channel neural prosthetic devices.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.12
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• pp.1219-1224
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• 2016

The current wireless power charge technologies are based on induction coupling, magnetic resonant coupling, electromagnetic wave, etc. However, the current wireless power charge technologies has several disadvantages including short transfer range, electromagnetic interference, etc. In this paper, we investigate and demonstrate a laser wireless power charge technology. A laser source is used in the transmitter to convert from electric power to optical power and a solar cell or a photodiode is used in the receiver to convert from optical power to electric power. The laser wireless power charge technology may be the most efficient wireless power charge technology in the long distance over than 10 meters. Our experimental results show a transfer efficiency of 2.15% at the 70-m long distance with a 100 mW laser transmitter and a photodiode receiver.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.221-221
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• 2013

Striving to replace the well known silicon nanocrystals embedded in oxides with solution-processable charge-trapping materials has been debated because of large scale and cost effective demands. Herein, a silicon quantum dot-polystyrene nanocomposite (SiQD-PS NC) was synthesized by postfunctionalization of hydrogen-terminated silicon quantum dots (H-SiQDs) with styrene using a thermally induced surface-initiated polymerization approach. The NC contains two miscible components: PS and SiQD@PS, which respectively are polystyrene and polystyrene chains-capped SiQDs. Spin-coated films of the nanocomposite on various substrate were thermally annealed at different temperatures and subsequently used to construct metal-insulator-semiconductor (MIS) devices and thin film field effect transistors (TFTs) having a structure p-$S^{++}$/$SiO_2$/NC/pentacene/Au source-drain. C-V curves obtained from the MIS devices exhibit a well-defined counterclockwise hysteresis with negative fat band shifts, which was stable over a wide range of curing temperature ($50{\sim}250^{\circ}C$. The positive charge trapping capability of the NC originates from the spherical potential well structure of the SiQD@PS component while the strong chemical bonding between SiQDs and polystyrene chains accounts for the thermal stability of the charge trapping property. The transfer curve of the transistor was controllably shifted to the negative direction by chaining applied gate voltage. Thereby, this newly synthesized and solution processable SiQD-PS nanocomposite is applicable as charge trapping materials for TFT based memory devices.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.777-788
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• 2014

This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power efficiency over the wide output voltage range, internal blocks are automatically activated or deactivated by the clock driver in the reconfigurable charge pump minimizing the switching power loss due to the On and Off operations of MOSFET. In addition, the leakage current paths in each mode are blocked to compensate for the variation of power efficiency with respect to the wide output voltage range. This chip is fabricated using $0.18{\mu}m$ BCD process with high power MOSFET options, and the die area is $1870{\mu}m{\times}1430{\mu}m$. The power consumption of the charge pump itself is 79.13 mW when the output power is 415.45 mW at the high voltage mode, while it is 20.097 mW when the output power is 89.903 mW at the low voltage mode. The measured maximum power efficiency is 84.01 %, when the output voltage is from 7.43 V to 12.23 V.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.12 no.6
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• pp.304-310
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• 2002

Novel charge trap type memory devices with reoxidized oxynitride gate dielectrics made by NO annealing and reoxidation process of initial oxide on substrate have been fabricated using 0.35 $\mu \textrm{m}$ retrograde twin well CMOS process. The feasibility for application as NVSM memory device and characteristics of traps have been investigated. For the fabrication of gate dielectric, initial oxide layer was grown by wet oxidation at $800^{\circ}C$ and it was reoxidized by wet oxidation at $800^{\circ}C$ after NO annealing to form the nitride layer for charge trap region for 30 minutes at $850^{\circ}C$. The programming conditions are possible in 11 V, 500 $\mu \textrm{s}$ for program and -13 V, 1ms for erase operation. The maximum memory window is 2.28 V. The retention is over 20 years in program state and about 28 hours in erase state, and the endurance is over $3 \times 10^3$P/E cycles. The lateral distributions of interface trap density and memory trap density have been determined by the single junction charge pumping technique. The maximum interface trap density and memory trap density are $4.5 \times 10^{10} \textrm{cm}^2$ and $3.7\times 10^{18}/\textrm{cm}^3$ respectively. After $10^3$ P/E cycles, interlace trap density increases to $2.3\times 10^{12} \textrm{cm}^2$ but memory charges decreases.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.2
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• pp.19-24
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• 1998

The problem of Smith-Purcell radiation by a strip grating over a groundeddielectric slabl is analyzed by use of the equivalence principle, Floquet's theorem, and the method of moment. the relative radiation intensities of the space harmonics, computed by use of the proposed method, for the appropriately chosen charge velocities and grating dimensions are presented. In particular, some relationships between the smith-purcell radiation and the leaky-wave radiation in the proposed geometry are investigated.