• 전기학회논문지P
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• 제65권4호
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• pp.285-291
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• 2016

A light-emitting diode (LED) has been increasingly applied to various industrial fields and general lightings because of its high efficiency, low power consumption, environment-friendly characteristic and long lifetime. To drive the LED lighting, a power converter with the constant output current is needed. Among many power converters, the flyback converter is chosen by many converter designers due to high power density, structural simplicity, and miniaturization. In this converter, an electrolytic capacitor is generally chosen for the stabilization of the DC voltage because of having the large capacitance and the low price. However, the disadvantages are the short expected life time and 120Hz ripple currents on the converter output node. In this paper, a single-stage dimmable PFC DCM flyback converter without the electrolytic capacitor is proposed to prolong the lifetime of the LED driver. For the long lifetime of the converter, the polyester film capacitor with the small capacitance is substituted for the electrolytic capacitor on the output node and an LC resonant filter is added to damp 120Hz ripple current. The proposed converter is verified through the simulation and the experimental works.

• 조명전기설비학회논문지
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• 제27권10호
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• pp.59-68
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• 2013

This paper proposes the boost type bidirectional DC/DC converter with high efficiency for electric vehicle using an interleave method. This interleave method can reduce the system size because it reduces the ripple of output voltage and input current with no add to extra filter. Proposed system is consist of two converters and applies to interleaved method through phase shift to each converter. And it implements the high boost through voltage double and series construction of output port. Also, it reduces the price and increases the efficiency as operating the ZCS by leakage inductance of transformer and capacitor of voltage double with not add special reactor. Proposed DC/DC converter using interleave method is proved the validity through the result of PSIM simulation and experiment of 5kW DC/DC converter.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권4호
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• pp.471-476
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• 2015

This paper describes a CMOS hysteretic DC-DC buck converter with a constant switching frequency for mobile applications. The inherent problems of a large output ripple voltage that the conventional hysteretic DC-DC buck converters has faced have been resolved by using the proposed DC-DC buck converter which employed a ramp generator circuit to be able to increase a switching frequency. The proposed architecture enables the settling response time of charge pump circuit within the converter to become less than 6us suitable for mobile applications. The proposed DC-DC buck converter was implemented by using 0.35 um BCDMOS process and die size was $1.37mm{\times}1.37mm$. The measurement results showed that the proposed circuit received the input of 3.7 V and generated output of 1.2 V with the output ripple voltages less than 20 mV under load currents of 100~400 mA at the fixed switching frequency of 2 MHz. The maximum efficiency of the proposed hysteretic buck converter was measured to be around 93%.

• Journal of Power Electronics
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• 제12권3호
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• 대한전기학회논문지
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• 제40권2호
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• pp.162-172
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• 1991

In proportion to the capacity enlargement of the induction motor system controlled by current source inverter, the capacitance of the commutating capacitor is enlarged and then the spike value of output voltage is increased at the moment of charge and discharge. Moreover, the output currnet includes a number of harmonic components. Such voltage spike and harmonics generate the torque ripple and lead to bad effects on the performance of the induction motor. In this study, all the harmonics excluding 17th and 19th harmonics were mostly elimunated by adopting 18-phase Triple High Frequency Current Source Inverter(HFCSI), and the spike component of output voltage was reduced by adding the Voltage Clamping Circuit(VCC). As a result, the torque ripple and the commutation loss were reduced and the performance of the system was improved. Experiments for speed control were carried out in the tripple current source inverter system for induction motor drive. Overall system was controlled by ONE CHIP MICROCOMPUTER(INTEL 8751). Control circuits were simplified and good experimental results in the constant V/F control were obtained due to the flexibility of the microcomputer.

• Journal of Power Electronics
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• 제17권4호
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• pp.991-1003
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• 2017

The conventional sliding mode control (CSMC) has a number of problems. It may cause dc output voltage ripple and it cannot guarantee the robustness of the whole system for a matrix rectifier (MR). Furthermore, the existence of a filter can decrease the input power factor (IPF). Therefore, a novel global sliding mode control (GSMC) based on a hyperbolic tangent function with IPF compensation for MRs is proposed in this paper. Firstly, due to the reachability and existence of the sliding mode, the condition of the matrix rectifier's robustness and chattering elimination is derived. Secondly, a global switching function is designed and the determination of the transient operation status is given. Then a SMC compensation strategy based on a DQ transformation model is applied to compensate the decreasing IPF. Finally, simulations and experiments are carried out to verify the correctness and effectiveness of the control algorithm. The obtained results show that compared with CSMC, applying the proposed GSMC based on a hyperbolic tangent function for matrix rectifiers can achieve a ripple-free output voltage with a unity IPF. In addition, the rectifier has an excellent robust performance at all times.

• Journal of Power Electronics
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• 제19권1호
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• pp.220-233
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• 2019

This work aims to study and analyze the various operating modes of universal power converter which is powered by solar and thermoelectric generators. The proposed converter is operated in a DC-DC (buck or boost mode) and DC-AC (single phase) inverter with high efficiency. DC power sources, such as solar photovoltaic (SPV) panels, thermoelectric generators (TEGs), and Li-ion battery, are selected as input to the proposed converter according to the nominal output voltage available/generated by these sources. The mode of selection and output power regulation are achieved via control of the metal-oxide semiconductor field-effect transistor (MOSFET) switches in the converter through the modified stepped perturb and observe (MSPO) algorithm. The MSPO duty cycle control algorithm effectively converts the unregulated DC power from the SPV/TEG into regulated DC for storing energy in a Li-ion battery or directly driving a DC load. In this work, the proposed power sources and converter are mathematically modelled using the Scilab-Xcos Simulink tool. The hardware prototype is designed for 200 W rating with a dsPIC30F4011 digital controller. The various output parameters, such as voltage ripple, current ripple, switching losses, and converter efficiency, are analyzed, and the proposed converter with a control circuit operates the converter closely at 97% efficiency.

• 대한전자공학회논문지SD
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• 제42권2호
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• pp.1-8
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• 2005

System-on-glass를 위해 poly-Si TFT로 면적이 작으면서도 리플전압을 최소화한 DC-DC 전압 변환회로를 개발하였다. 전압 변환회로는 전하 펌핑 회로, 문턱전압 변화를 보상한 비교기, 오실레이터, 버퍼, 다중 위상 클럭을 만들기 위한 지연 회로로 구성된다. 제안한 다중 위상 클럭킹을 적용함으로써 클럭 주파수 또는 필터링 캐패시터의 증가 없이도 낮은 출력 리플전압을 얻음으로써 DC-DC 변환기의 면적을 최소화 하였다. 제안한 DC-DC 변환회로를 제작하여 측정한 결과 $R_{out}=100k\Omega,\;C_{out}=100pF$, 그리고 $f_{clk}=1MHz$에서 Dickson 구조와 기존의 cross-coupled 구조에서의 리플전압은 각각 590mv와 215mv인 반면 4-위상 클럭킹을 적용한 구조에서는 123mV이다. 그리고 50mV의 리플전압을 가지기 위해 필요한 필터링 캐패시터의 크기는 $I_{out}=100uA$와 $f_{clk}=1MHz$에서 Dickson 구조와 기존의 cross-coupled 구조에서는 각각 1029pF와 575pF인 반면 4-위상과 6-위상 클럭킹을 적용한 구조에서는 단지 290pF와 157pF만이 각각 요구된다. 구조별 효율로는 Dickson 구조의 전하 펌프에서는 $59\%$, 기존의 cross-coupled 구조와 본 논문에서 제안한 4-위상을 적용한 cross-coupled 구조의 전하 펌프에서는 $65.7\%$와 $65.3\%$의 효율을 각각 가진다.

• 한국산학기술학회논문지
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• 제20권3호
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• pp.491-499
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• 2019

최근에, 전원 공급 장치에 있어서 파워의 품질에 대한 요구가 높아지고 있다. IEC 61000-3-2 규격은 조명을 위한 AC/DC 전원 공급 장치에 대하여 역률(PF)과 전체 파형 왜곡률(THD)에 대한 규격을 만족하도록 요구하고 있다. 또 출력단의 전류 변화에 의해 발광체 광량이 바뀜에 따라 발생되는 플리커 현상에 대해 유럽권 선진국가는 ripple rate의 기준을 15~30%로 설정해 규제하고 있다. 따라서 국내에서도 기준을 마련하고 규제를 추진 중에 있다. 그래서 본 논문은 PFC 규격을 만족하고, 회로 1차, 2차 간 절연 기능을 가지기 위해 Flyback 컨버터를 적용하며, LED 전류의 저주파 리플을 저감하기 위해 Flyback, Coupled Inductor, LC 병렬 공진 필터, LLC 공진 필터, Cuk을 이용한 각각의 LED 구동회로를 PSIM을 통해 시뮬레이션 함으로써 각각의 방식들을 비교하였으며, 출력측 리플 저감을 위해 1차측에 Coupled Inductor와 2차측에 LC 공진을 적용한 Coupled LC 공진 회로를 제안하였으며, Coupled LC 공진 방식은 출력 커패시터가 78uF으로 작으며, 출력 리플은 전압 2.38V, 전류 0.05A로 기존의 방식보다 22%의 출력 리플 저감을 확인 하였다.

• 한국전자통신학회논문지
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• 제12권6호
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• pp.1065-1070
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• 2017

마그네틱 기어는 기계적인 접촉 없이 회전 기계의 입력측과 출력측이 자기적으로 결합되어 동력을 전달한다. 마그네틱 기어는 내측회전자, 외측회전자, 폴피스로 구성되어 있으며, 동력전달 시 두 회전체와 폴피스 사이의 자기저항 차이로 토크리플이 발생하게 된다. 이러한 토크리플은 회전기계의 소음과 진동의 원인이 되기 때문에 최소화하는 방안이 필요하다. 본 논문에서는 토크리플 저감 방안으로 폴피스의 각진 모서리를 깎아 필렛을 적용한 형상을 제안하였다. 2D 유한요소해석법을 활용하여 필렛 파라미터 변화에 따른 마그네틱 기어의 토크리플을 비교 및 분석하고 토크리플이 우수한 폴피스 형상을 모색하였다.