• Title/Summary/Keyword: Output Matching Circuit

Search Result 165, Processing Time 0.027 seconds

A 2.65 GHz Doherty Power Amplifier Using Internally-Matched GaN-HEMT (내부정합된 GaN-HEMT를 이용한 2.65 GHz Doherty 전력증폭기)

  • Kang, Hyunuk;Lee, Hwiseob;Lim, Wonseob;Kim, Minseok;Lee, Hyoungjun;Yoon, Jeongsang;Lee, Dongwoo;Yang, Youngoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.27 no.3
    • /
    • pp.269-276
    • /
    • 2016
  • This paper presents a 2.65 GHz Doherty power amplifier with internally-matched GaN HEMT. Internal matching circuits were adopted to match its harmonic impedances inside the package. Simultaneously, due to the partially matched fundamental impedance, input and output matching networks become simpler. Bond wires and parasitic elements of transistor package were predicted by EM simulation. For the LTE signal with 6.5 dB PAPR, the implemented Doherty power amplifier shows a power gain of 13.0 dB, a saturated output power of 55.4 dBm, an efficiency of 49.1 %, and ACLR of -26.3 dBc at 2.65 GHz with an operating voltage of 48 V.

2~6 GHz Wideband GaN HEMT Power Amplifier MMIC Using a Modified All-Pass Filter (수정된 전역통과 필터를 이용한 2~6 GHz 광대역 GaN HEMT 전력증폭기 MMIC)

  • Lee, Sang-Kyung;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.26 no.7
    • /
    • pp.620-626
    • /
    • 2015
  • In this paper, a 2~6 GHz wideband GaN power amplifier MMIC is designed and fabricated using a second-order all-pass filter for input impedance matching and an LC parallel resonant circuit for minimizing an output reactance component of the transistor. The second-order all-pass filter used for wideband lossy matching is modified in an asymmetric configuration to compensate the effect of channel resistance of the GaN transistor. The power amplifier MMIC chip that is fabricated using a $0.25{\mu}m$ GaN HEMT foundry process of Win Semiconductors, Corp. is $2.6mm{\times}1.3mm$ and shows a flat linear gain of about 13 dB and input return loss of larger than 10 dB. Under a saturated power mode, it also shows output power of 38.6~39.8 dBm and a power-added efficiency of 31.3~43.4 % in 2 to 6 GHz.

Design of Dual-band Power Amplifier using CRLH of Metamaterials (메타구조의 CRLH를 이용한 이중대역 전력증폭기 설계)

  • Ko, Seung-Ki;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.47 no.12
    • /
    • pp.78-83
    • /
    • 2010
  • In this paper, a novel dual-band power amplifier using metamaterials has been realized with one RF GaN HEMT diffusion metal-oxide-semiconductor field effect transistor. The CRLH TL can lead to metamaterial transmission line with the dual-band tuning capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. We have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency. Two operating frequencies are chosen at 900 MHz and 2140 MHz in this work. The measured results show that the output power of 39.83 dBm and 35.17 dBm was obtained at 900 MHz and 2140 MHz, respectively. At this point, we have obtained the power-added efficiency (PAE) and IMD of 60.2 %, -23.17dBc and 67.3 %, -25.67dBc at two operation frequencies, respectively.

2.6 GHz GaN-HEMT Power Amplifier MMIC for LTE Small-Cell Applications

  • Lim, Wonseob;Lee, Hwiseob;Kang, Hyunuk;Lee, Wooseok;Lee, Kang-Yoon;Hwang, Keum Cheol;Yang, Youngoo;Park, Cheon-Seok
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.3
    • /
    • pp.339-345
    • /
    • 2016
  • This paper presents a two-stage power amplifier MMIC using a $0.4{\mu}m$ GaN-HEMT process. The two-stage structure provides high gain and compact circuit size using an integrated inter-stage matching network. The size and loss of the inter-stage matching network can be reduced by including bond wires as part of the matching network. The two-stage power amplifier MMIC was fabricated with a chip size of $2.0{\times}1.9mm^2$ and was mounted on a $4{\times}4$ QFN carrier for evaluation. Using a downlink LTE signal with a PAPR of 6.5 dB and a channel bandwidth of 10 MHz for the 2.6 GHz band, the power amplifier MMIC exhibited a gain of 30 dB, a drain efficiency of 32%, and an ACLR of -31.4 dBc at an average output power of 36 dBm. Using two power amplifier MMICs for the carrier and peaking amplifiers, a Doherty power amplifier was designed and implemented. At a 6 dB back-off output power level of 39 dBm, a gain of 24.7 dB and a drain efficiency of 43.5% were achieved.

A CMOS Optical Receiver Design for Optical Printed Circuit Board (광PCB용 CMOS 광수신기 설계)

  • Kim Young;Kang Jin-Ku
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.43 no.7 s.349
    • /
    • pp.13-19
    • /
    • 2006
  • A 5Gb/s cross coupled transimpedance amplifier (TIA) & limiting amp(LA), regulated cascode(RGC) is realized in a 0.18$\mu$m CMOS technology for optical printed circuit board applications. The optical receiver demonstrates $92.8db{\Omega}$ transimpedance and limiting amplifier gain, 5Gb/s bandwidth for 0.5pF photodiode capacitance, and 9.74mW power dissipation from 1.8V, 2.4V supply. Input stage impedance is $50{\Omega}$. The circuit was implemented on an optical PCB, and the 5Gb/s data output signal was measured with a good data eye opening.

Design and Manufacture of Multi-layer VCO by LTCC (저온 동시소성 세라믹을 이용한 적층형 VCO의 설계 및 제작)

  • Park, Gwi-Nam;Lee, Heon-Yong;Kim, Ji-Gyun;Song, Jin-Hyung;Rhie, Dong-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2003.05c
    • /
    • pp.291-294
    • /
    • 2003
  • The circuit substrate was made from the Low Temperature Cofired Ceramics(LTCC) that a $\varepsilon_\gamma$ was 7.8. Accumulated Varactor and the low noise transistor which were a Surface Mount Device-type element on LTCC substrate. Let passive element composed R, L, C with strip-line of three dimension in the multilayer substrate circuit inside, and one structure accumulate band-pass filter, resonator, a bias line, a matching circuit, and made it. Used Screen-Print process, and made Strip-line resonator. A design produced and multilayer-type VCO(Voltage Controlled Oscillator), and recognized a characteristic with the Spectrum Analyzer which was measurement equipment. Measured multilayer structure VCO is oscillation frequency 1292[MHz], oscillation output -28.38[dBm], hamonics characteristic -45[dBc] in control voltage 1.5[V], A phase noise is -68.22[dBc/Hz] in 100 KHz offset frequency. The oscillation frequency variable characteristic showed 30[MHz/V] characteristic, and consumption electric current is approximately 10[mA].

  • PDF

Design of a Distributed Mixer Using Dual-Gate MESFET's (Dual-Gate MESFET를 이용한 분포형 주파수 혼합기의 설계)

  • Oh, Yang-Hyun;An, Jeong-Sig;Kim, Han-Suk;Lee, Jong-Arc
    • Journal of IKEEE
    • /
    • v.2 no.1 s.2
    • /
    • pp.15-23
    • /
    • 1998
  • In this paper, distributed mixer is studied at microwave frequency. The circuit of distributed mixer composed of gate 1,2, drain transmission lines, matching circuits in input and output terminal, DGFET's. For impedance matching of input and output port at higher frequency, image impedance concept is introduced. In distributed mixer, a DGFET's impedances are absorbed by artificial transmission line, this type of mixer can get a very broadband characteristics compared to that of current systems. A RF/LO signal is applied to each gate input port, and are excited the drain transmission line through transcondutance of the DGFET's. The output signals from each drain port of DGFET's added in same phases. We designed and frabricated the distributed mixer, and a conversion gain, noise figure, bandwidth, LO/RF isolation of the mixer are shown through computer simulation and experimentation.

  • PDF

The variable power divider circuit to use the ring-hybrid coupler (링-하이브리드 커플러를 이용한 가변 전력 분배기 회로)

  • Park, Ung-hee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.20 no.2
    • /
    • pp.253-259
    • /
    • 2016
  • This paper introduces a new variable power divider circuit with an arbitrary power division ratio ranging from $1:{\infty}$ to ${\infty}:1$. The proposed power divider circuit consists of one branch-line coupler to be a good input matching characteristic, two variable phase shifters with 90-degree phase variation to be connected two output paths of the branch-line coupler, and one ring-hybrid coupler to combine output signals of two variable phase shifter. The power division ratio between the two output ports of the proposed power divider can be easily controlled by the phase variation of the two phase shifter. The proposed power divider circuit fabricates on laminated RF-35 (h = 20 mil, er=3.5; Taconic) with a center frequency of 2 GHz. The power division ratio of the fabricated prototype varies from about 1:1000 to 5000000:1, with an input reflection characteristic(S11) of below -20 dB, an insertion loss of about -1.0 dB, and an isolation characteristic of below -17 dB between two output ports in the range 1.9-2.1 GHz.

A Decade-Bandwidth Distributed Power Amplifier MMIC Using 0.25 μm GaN HEMT Technology

  • Shin, Dong-Hwan;Yom, In-Bok;Kim, Dong-Wook
    • Journal of electromagnetic engineering and science
    • /
    • v.17 no.4
    • /
    • pp.178-180
    • /
    • 2017
  • This study presents a 2-20 GHz monolithic distributed power amplifier (DPA) using a $0.25{\mu}m$ AlGaN/GaN on SiC high electron mobility transistor (HEMT) technology. The gate width of the HEMT was selected after considering the input capacitance of the unit cell that guarantees decade bandwidth. To achieve high output power using small transistors, a 12-stage DPA was designed with a non-uniform drain line impedance to provide optimal output power matching. The maximum operating frequency of the proposed DPA is above 20 GHz, which is higher than those of other DPAs manufactured with the same gate-length process. The measured output power and power-added efficiency of the DPA monolithic microwave integrated circuit (MMIC) are 35.3-38.6 dBm and 11.4%-31%, respectively, for 2-20 GHz.

Design and Fabrication of Ku-Band Power Amplifier Using GaN HEMT Die (GaN HEMT Die를 이용한 Ku-대역 전력 증폭기 설계 및 제작)

  • Kim, Sang-Hoon;Kim, Bo-Ki;Choi, Jin-Joo;Jeong, Byeoung-Koo;Tae, Hyun-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.25 no.6
    • /
    • pp.646-652
    • /
    • 2014
  • This paper presents a design and fabrication of Ku-band power amplifier using Gallium Nitride High Electron Mobility Transistor (GaN HEMT) die. In order to fabricate the low-cost Ku-band power amplifier, a Printed Circuit Board(PCB) was used for input/output matching circuits instead of manufacturing process to use an expensive substrate. The measured output power is 42.6 dBm, the drain efficiency is 37.7 % and the linear gain is 7.9 dB under pulse operation at the frequency of 14.8 GHz. Under the continuous wave(CW) test, the output power is 39.8 dBm, the drain efficiency is 24.1 % and the linear gain is 7.2 dB.