• Proceedings of the KIEE Conference
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• 2008.10c
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• pp.123-125
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• 2008

This paper deals with output voltage characteristics analysis of outage and phase jump generator. As soon as the outage occurs the STS(Solid Transfer Switch)s are switched off. At the beginning of the outage the DG is required to limit the reverse current within the rated DG output current. In case of phase jump the DG output voltage phase should be adjusted with PLL. Simulation results show the output voltage characteristics of the generator.

• Proceedings of the KIPE Conference
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• 2008.10a
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• pp.106-108
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• 2008

This paper describes output characteristics analysis of outage and phase jump generator for microgrid. The outage and phase jump can be generated with 3-phase voltage disturbance generator. As soon as the outage occurs the STS(Solid Transfer Switch)s are switched off. At the beginning of the outage the PCS is required to limit the reverse current within the rated PCS output current. In case of phase jump the PCS output voltage phase should be adjusted. The generator output characteristics are analysed through simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.5
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• pp.399-406
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• 2014

This study investigates the structure and operation of the ITER VS converter and proposes a sequence control method for six series-connected VS converters to reduce reactive power. The operation and the proposed sequence control method are verified through RTDS simulation. The ITER VS converter must supply voltage/current to the superconducting magnets for plasma current vertical stabilization, and the four-quadrant operation must proceed without a zero-current discontinuous section. The operation mode of the VS converter is separated into a 12- and 6-pulse circulating current and transition modes according to the size of the load current. The output voltage of the unit VS converter is limited because of the rated voltage; however, the superconducting coil must increase the operating output voltage. Thus, the VS converter must be connected in a 6-series to provide the required operating output voltage. The output voltage of the VS converters is controlled continuously; however, reactive power is limited within a minimized value of the grid. In this study, the unit converter is compared with converters connected in a 6-series to determine a suitable sequence control method. The output voltage is the same in all cases, but the maximum reactive power is reduced from 100% to 73%. This sequence control method is verified through RTDS simulation.

• Journal of the Optical Society of Korea
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• v.16 no.4
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• pp.349-353
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• 2012

Uniform spreading of injection current in light-emitting diodes (LEDs) is one of the crucial requirements for better device performances. It is reported that non-uniform current spreading leads to low output power, high current crowding, heating, and reliability degradation of the LED device. This paper reports on the effects of different surface and electrode geometries in the LEDs. To increase the output power of LEDs and reduce the series resistance, a rectangular-type LED (RT-LED) with a centered island cathode has been fabricated and investigated by comparison with a conventional LED (CV-LED). The performances of RT-LEDs were prominently enhanced via uniform current spreading and low current crowding. Performances in terms of increased output power and lower forward voltage of simulated RT-LEDs are much superior to those of CV-LEDs. Based on these results, we investigated the correlation between device geometries and optical characteristics through the fabricated CV and RT-LEDs. The measured output power and forward voltage of the RT-LEDs at 100 mA are 64.7% higher and 8% smaller compared with those of the CV-LEDs.

• Journal of Power Electronics
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• v.15 no.3
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• pp.587-601
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• 2015

A high step-up dc-dc converter is proposed for photovoltaic power systems in this paper. The proposed converter consists of an input current doubler, a symmetrical switched-capacitor doubler and an active-clamp circuit. The input current doubler minimizes the input current ripple. The symmetrical switched-capacitor doubler is composed of two symmetrical quasi-resonant switched-capacitor circuits, which share the leakage inductance of the transformer as a resonant inductor. The rectifier diodes (switched-capacitor circuit) are turned off at the zero current switching (ZCS) condition, so that the reverse-recovery problem of the diodes is removed. In addition, the symmetrical structure results in an output voltage ripple reduction because the voltage ripples of the charge/pump capacitors cancel each other out. Meanwhile, the voltage stress of the rectifier diodes is clamped at half of the output voltage. In addition, the active-clamp circuit clamps the voltage surges of the switches and recycles the energy of the transformer leakage inductance. Furthermore, pulse-width modulation plus phase angle shift (PPAS) is employed to control the output voltage. The operation principle of the converter is analyzed and experimental results obtained from a 400W prototype are presented to validate the performance of the proposed converter.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2204-2206
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• 1997

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with a low output current ripple is proposed. The proposed circuit improve the demerits of the previously presented ZVBCS-FB-PWM converters[5-8] such as use of lossy components or additional active switches. A simple auxiliary circuit which includes neither lossy components nor active switches provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches. In addition, this proposed circuit reduces a output current ripple considerably. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive far high power (> 1kW) applications.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.1
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• pp.63-67
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• 2009

Current mismatch in a charge pump causes degradation in spectral purity of the phase locked loops(PLLs), such as reference spurs. The current mismatch can be reduced by increasing the output resistance of the charge pump, as in a cascoded output stage. However as the supply voltage is lowered, it is hard to stack transistors. In this paper, a new method for reducing the current mismatch is proposed. The proposed method is based on a feed-forward compensation for the channel length modulation effect of the output stage. The new method has been demonstrated through simulations on typical $0.18{\mu}m$ CMOS circuits.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.469-471
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• 2008

The charge pump affects the performance of PLL. In designing the charge pump, we need to consider various issues such as current mismatch, charge sharing, feedthrough, charge injection, and leakage current. This paper propose the new charge pump circuit which is improved in terms of the current match over the existing high-speed charge pump. The simple method used for reducing current mismatch is the technique that uses a cascode in order to increase the output resistance of the charge pump. However the method limits the output voltage range of the charge pump. So the method is hard to apply as the supply voltage is lowered. Thus this paper proposes a new charge pump circuit using an op amp instead of the cascode. And the new charge pump circuit has an excellent current matching characteristics over a wide output range.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1689-1697
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• 2016

Continuous conduction mode (CCM) boost converters are commonly used in home appliances and various industries because of their simple topology and low input current ripples. However, these converters suffer from several disadvantages, such as hard switching of the active switch and reverse recovery problems of the output diode. These disadvantages increase voltage stresses across the switch and output diode and thus contribute to switching losses and electromagnetic interference. A new topology is presented in this work to improve the switching characteristics of CCM boost converters. Zero-current turn-on and zero-voltage turn-off are achieved for the active switches. The reverse-recovery current is reduced by soft turning-off the output diode. In addition, an input current sensorless control is applied to the proposed topology by pre-calculating the duty cycles of the active switches. Power factor correction is thus achieved with less effort than that required in the traditional method. Simulation and experimental results verify the soft-switching characteristics of the proposed topology and the effectiveness of the proposed input current sensorless control.

• Journal of the Semiconductor & Display Technology
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• v.13 no.4
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• pp.65-70
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• 2014

This paper is to improve the problem of the LED dimming control system using the conventional PWM and DAC method. The conventional PWM method controls the average current to switch dimming signal. This method generates the flicker when controlling at a low current. In order to solve the problem, this system prevents the flicker with the DAC method. The LED is lit at micro-current flowing in the LED. And offset voltage is generated in the output of the DAC when the DAC output is very low voltage as 0V. This was resolved by the voltage drop of the output voltage to construct a negative offset circuit. In addition, the LED current can't flow as set values because of overheating of FET. In order to solve the problem, the 16 bits ADC in the microprocessor is a more accurate current control receives the LED current in comparison with the set value. Therefore, the LED dimming control system proposed in this paper showed the accurate and reliable more than conventional systems.