1 |
H. Arora, N. Klemmer, J. C. Morizio, and P. D. Wolf, 'Enhanced phase noise modeling of fractional-N frequency synthesizers,' IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 2, pp. 379-395, Feb. 2005
DOI
ScienceOn
|
2 |
W. Rhee, Bang-Sup Song, Akbar Ali, 'A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order modulator,' IEEE J. Solid-State Circuits, vol. 35, no. 10, pp. 1453-1460, Oct. 2000
DOI
ScienceOn
|
3 |
Young-Shig Choi, Dae-Hyun Han, 'Gain- boosting charge pump for current matching in phase-locked loop' IEEE Trans. Circuits Syst. II, Express Briefs, vol. 53, no. 10, pp. 1022-1025, Oct. 2006
DOI
ScienceOn
|
4 |
Jae-Shin Lee, Min-Sun Keel, Shin-Il Lim and Suki Kim, 'Charge pump with perfect current matching characteristics in phase-locked loops,' Electronics Letters, vol. 36, pp. 1907-1908, Nov. 2000
DOI
ScienceOn
|
5 |
A. Waizman, 'A delay line loop for frequency synthesis of deskewed clock,' ISSCC Digest of Technical Papers, 1994
|