• Title/Summary/Keyword: Organic pentacene

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Extraction of Contact Resistance in Interface Between Au Electrode and Pentacene Thin Film (Au 전극과 pentacene 박막 계면의 contact resistance 측정)

  • Jung, Bo-Chul;Ryu, Gi-Seong;Kim, Yong-Kyu;Song, Chung-Kun
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.481-482
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    • 2006
  • We fabricated pentacene organic thin film transistor with good uniformity. And we extracted contact resistance in organic thin film transistors from the plot of the inverse of drain current versus channel length by extrapolating the curve to a channel length of zero, and multiplying by drain-source voltage. Extracted contact resistance is about $70K{\Omega}$ at gate-drain voltage of -20 V

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Performance improvement in bottom-contact pentacene organic thin-film transistors by the PMMA layer insertion

  • Lyoo, Ki-Hyun;Kim, Byeong-Ju;Lee, Cheon-An;Jung, Keum-Dong;Park, Dong-Wook;Park, Byung-Gook;Lee, Jong-Duk
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1139-1141
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    • 2006
  • For the bottom-contact pentacene organic thin-film transistors (OTFTs), the insertion of a thin PMMA layer $(20{\AA})$ between the pentacene and the electrode improves the electrical performances, such as carrier mobility and on-current magnitude, about 4 times larger than those of the devices without the PMMA. The performance enhancement is presumably due to the decreased contact resistance between metal and pentacene by inserting the thin PMMA layer.

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Hysteresis Behavior in Pentacene Organic Thin-film Transistors

  • So, Myeong-Seob;Suh, Min-Chul;Koo, Jae-Bon;Choi, Byoung-Deog;Choi, Dae-Chul;Lee, Hun-Jung;Mo, Yeon-Gon;Chung, Ho-Kyoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1364-1369
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    • 2005
  • In this paper, we have identified the mechanism of C-V hysteresis behavior often observed in pentacene organic thin-film transistors (OTFTs). The capacitance-voltage (C-V) characteristics were measured for pentacene OTFTs fabricated on glass substrates with MoW as gate/source/drain electrode and TEOS $SiO_2$ as gate insulator. The measurements were made at room temperature and elevated temperatures. From the room temperature measurements, we found that the hysteresis behavior was caused by hole injection into the gate insulator from the pentacene semiconductor for large negative gate voltages, resulting in the negative flat-band voltage shift. However electron injection was observed only at elevated temperatures

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Electrical Characteristics of Pentacene Thin Film Transistors.

  • Kim, Dae-Yop;Lee, Jae-Hyuk;Kang, Dou-Youl;Choi, Jong-Sun;Kim, Young-Kwan;Shin, Dong-Myung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.69-70
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    • 2000
  • There are currently considerable interest in the applications of conjugated polymers, oligomers, and small molecules for thin-film electronic devices. Organic materials have potential advantages to be utilized as semiconductors in field-effect transistors and light-emitting diodes. In this study, pentacene thin-film transistors (TFTs) were fabricated on glass substrate. Aluminums were used for gate electrodes. Silicon dioxide was deposited as a gate insulator by PECVD and patterned by reactive ion etching (R.I.E). Gold was used for the electrodes of source and drain. The active semiconductor pentacene layer was thermally evaporated in vacuum at a pressure of about $10^{-8}$ Torr and a deposition rate $0.3{\AA}/s$. The fabricated devices exhibited the field-effect mobility as large as 0.07 $cm^2/V.s$ and on/off current ratio as larger than $10^7$.

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A STUDY ON THE ELECTRICAL CHARACTERISTICS OF ORGANIC THIN FILM TRANSISTORS WITH SURFACE-TREATED GATE DIELECTRIC LAYER (표면 처리한 $SiO_2$를 게이트 절연막으로 하는 박막 트랜지스터의 특성 연구)

  • Lee, Jae-Hyuk;Lee, Yong-Soo;Park, Jae-Hoon;Choi, Jong-Sun;Kim, Eu-Gene
    • Proceedings of the KIEE Conference
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    • 2000.11c
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    • pp.455-457
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    • 2000
  • In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces, where the gate dielectrics were treated by the two methods which are the deposition of Octadecyltrichlorosilane (OTS) on the insulator and rubbing the insulator surface. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-7}$ Torr and at a deposition rate of $0.3{\AA}/sec$. Aluminum and gold were used for the gate and source/drain electrodes. OTS is used as a self-alignment layer between $SiO_2$ and pentacene. The gate dielectric surface was rubbed before pentacene is deposited on the insulator. In order to confirm the changes of the surface morphology the atomic force microscopy (AFM) was utilized. The characteristics of the fabricated TFTs are measured to clarify the effects of the surface treatment.

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Characteristic Effects of Buffer Layers on Organic Light Emitting Devices

  • Park, Jae-Hoon;Lee, Yong-Soo;Kwak, Yun-Hee;Choi, Jong-Sun
    • KIEE International Transactions on Electrophysics and Applications
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    • v.11C no.3
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    • pp.43-48
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    • 2001
  • The stability and efficiency of organic light emitting devices are the most critical problems to be solved. The devices based on tris-8-(hydroxyquinoline) aluminum ($Alq_3$) and N,N-diphenyl-N,N-bis(3-methylphenyl)-1, 1-biphenyl-4,4-diamine (TPD) were used to study the effects of buffer layers on their characteristics. We have investigated the characteristic effects of CuPc (copper phthalocyanine) and pentacene buffer layers on the device characteristics, the (5${\sim}$20 nm thick) CuPc layers and the (10${\sim}$20 nm thick) pentacene layers were deposited. Efficiency was slightly improved and the turn-on voltages of the devices with the buffer layers were observed to have lower values than those of the devices without the buffer layers. It is believed that this result is attributed to the improvement of hole injection capability through the buffer layers into hole transport layer (HTL). We have also studied the atomic force microscopic images of the TPD layers deposited on the buffer layer and the bare ITO.

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Pressure Control Organic Vapor Deposition Methods for Fabricating Organic Thin-Film Transistors

  • Ahn, SeongDeok;Kang, Seong Youl;Oh, Ji Young;Suh, Kyung Soo;Cho, Kyoung Ik;Koo, Jae Bon
    • ETRI Journal
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    • v.34 no.6
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    • pp.970-973
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    • 2012
  • In this letter, we report on the development progress of a pressure control organic vapor deposition (PCOVD) technology used to design and build a large area deposition system. We also investigate the growth characteristics of a pentacene thin film by PCOVD. Using the PCOVD method, the mobility and on/off current ratio of an organic thin-film transistor (OTFT) on a plastic substrate are $0.1cm^2/Vs$ and $10^6$, respectively. The developed OTFT can be applied to a flexible display on a plastic substrate.

Fabrication of Screen Printed Organic Thin-Film Transistors

  • Yu, Jong-Su;Jo, Jeong-Dai;Kim, Do-Jin
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.629-632
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    • 2008
  • Printed organic thin-film transistors (OTFTs) were used in the fabrication of a screen- printed gate, source and drain electrodes on flexible plastic substrates using silver pastes, a coated polyvinylphenol dielectrics, and jetted bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) organic semiconductor. The OTFTs printed using screen printing and soluble processes made it was possible to fabricate a printed OTFT with a channel length as small as $13\;{\mu}m$ on plastic substrates; this was not possible using previous traditional printing techniques.

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Array of Pentacene TFTs for AMOLED

  • Choe, Ki-Beom;Jung, Hyun;Ryu, Gi-Seong;Xu, Yong-Xian;Lee, Jae-June;Song, Chung-Kun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1424-1427
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    • 2005
  • In this paper, we studied on the application of Organic Thin Film Transistors (OTFTs) to the active matrix organic light emitting diodes (AMOLED). We designed organic transistor based pixel circuits for AMOLED. The pixel circuit is consisted of two-transistor, one-capacitor and one-OLED. We report the simulation results of the pixel circuits that OLED current varied as the data line and scan line voltage. Also, we will describe the fabrication process of the Pentacene OTFTs arrays and the organic light emitting diodes. The driving results of the fabricated unit pixels and their 4x4 arrays are also presented.

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The electrical characteristics of pentacene field-effect transistors with polymer gate insulators

  • Kang, Gi-Wook;Kang, Hee-Young;Park, Kyung-Min;Song, Jun-Ho;Lee, Chang-Hee
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.675-678
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    • 2003
  • We studied the electrical characteristics of pentacene-based organic field-effect transistors (FETs) with polymethyl methacrylate (PMMA) or poly-4-vinylphenol (PVP) as the gate insulator. PMMA or PVP was spin-coated on the indium tin oxide glass substrate that serves as gate electrodes. The source-drain current dependence on the gate voltage shows the FET characteristics of the hole accumulation type. The transistor with PVP shows a higher field-effect mobility of 0.14 $cm^{2}/Vs$ compared with 0.045 $cm^{2}/Vs$ for the transistor with PMMA. The atomic force microscope (AFM) images indicate that the grain size of the pentacene on PVP is larger than that on PMMA. X-ray diffraction (XRD) patterns for the pentacene deposited on PVP exhibit a new Bragg reflection at $19.5{\pm}0.2^{\circ}$, which is absent for the pentacene on PMMA. This peak corresponds to the flat-lying pentacene molecules with less intermolecular spacing.

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