• Title/Summary/Keyword: Optimized process

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Low-Temperature Processed Thin Film Barrier Films for Applications in Organic Electronics (유기전자소자 적용을 위한 저온 공정용 배리어 박막 연구)

  • Kim, Junmo;An, Myungchan;Jang, Youngchan;Bae, Hyeong Woo;Lee, Wonho;Lee, Donggu
    • Journal of Sensor Science and Technology
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    • v.28 no.6
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    • pp.402-406
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    • 2019
  • Recently, semiconducting organic materials have been spotlighted as next-generation electronic materials based on their tunable electrical and optical properties, low-cost process, and flexibility. However, typical organic semiconductor materials are vulnerable to moisture and oxygen. Therefore, an encapsulation layer is essential for application of electronic devices. In this study, SiNx thin films deposited at process temperatures below 150 ℃ by plasma-enhanced chemical vapor deposition (PECVD) were characterized for application as an encapsulation layer on organic devices. A single structured SiNx thin film was optimized as an organic light-emitting diode (OLED) encapsulation layer at process temperature of 80 ℃. The optimized SiNx film exhibited excellent water vapor transmission rate (WVTR) of less than 5 × 10-5 g/㎡·day and transmittance of over 87.3% on the visible region with thickness of 1 ㎛. Application of the SiNx thin film on the top-emitting OLED showed that the PECVD process did not degrade the electrical properties of the device, and the OLED with SiNx exhibited improved operating lifetime

Thermal Process Effects on Grain Size and Orientation in (Bi1La1)4Ti3O12 Thin Film Deposited by Spin-on Method (스핀 코팅법으로 증착한 (Bi1La1)4Ti3O12 박막의 후속 열공정에 따른 입자 크기 및 결정 방향성 변화)

  • Kim, Young-Min;Kim, Nam-Kyeong;Yeom, Seung-Jin;Jang, Gun-Eik;Ryu, Sung-Lim;Sun, Ho-Jung;Kweon, Soon-Yong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.7
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    • pp.575-580
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    • 2007
  • A 16 Mb 1T1C FeRAM device was integrated with BLT capacitors. But a lot of cells were failed randomly during the measuring the bit-line signal distribution of each cell. The reason was revealed that the grain size and orientation of the BLT thin film were severely non-uniform. And the grain size and orientation were severely affected by the process conditions of post heat treatment, especially nucleation step. The optimized annealing temperature at the nucleation step was $560^{\circ}C$. The microstructure of the BLT thin film was also varied by the annealing time at the step. The longer process time showed the finer grain size. Therefore, the uniformity of the grain size and orientation could be improved by changing the process conditions of the nucleation step. The FeRAM device without random bit-fail cell was successfully fabricated with the optimized BLT capacitor and the sensing margin in bit-line signal distribution of it was about 340 mV.

Fabrication and Evaluation Properties of Titanium Sintered-body for a Sputtering Target by Spark Plasma Sintering Process (방전플라즈마 소결 공정을 이용한 스퍼터링 타겟용 타이타늄 소결체 제조 및 특성 평가)

  • Lee, Seung-Min;Park, Hyun-Kuk;Youn, Hee-Jun;Yang, Jun-Mo;Woo, Kee-Do;Oh, Ik-Hyun
    • Korean Journal of Metals and Materials
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    • v.49 no.11
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    • pp.845-852
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    • 2011
  • The Spark Plasma Sintering(SPS) method offers a means of fabricating a sintered-body having high density without grain growth through short sintering time and a one-step process. A titanium compact having high density and purity was fabricated by the SPS process. It can be used to fabricate a Ti sputtering target with controlled parameters such as sintering temperature, heating rate, and pressure to establish the optimized processing conditions. The compact/target(?) has a diameter of ${\Phi}150{\times}6.35mm$. The density, purity, phase transformation, and microstructure of the Ti compact were analyzed by Archimedes, ICP, XRD and FE-SEM. A Ti thin-film fabricated on a $Si/SiO_2$ substrate by a sputtering device (SRN-100) was analyzed by XRD, TEM, and SIMS. Density and grain size were up to 99% and below $40{\mu}m$, respectively. The specific resistivity of the optimized Ti target was $8.63{\times}10^{-6}{\Omega}{\cdot}cm$.

Influences of heating processes on properties and microstructure of porous CeO2 beads as a surrogate for nuclear fuels fabricated by a microfluidic sol-gel process

  • Song, Tong;Guo, Lin;Chen, Ming;Chang, Zhen-Qi
    • Nuclear Engineering and Technology
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    • v.51 no.1
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    • pp.257-262
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    • 2019
  • The control of microstructure is critical for the porous fuel particles used for infiltrating actinide nuclides. This study concerns the effect of heating processes on properties and microstructure of the fuel particles. The uniform gel precursor beads were synthesized by a microfluidic sol-gel process and then the porous $CeO_2$ microspheres, as a surrogate for the ceramic nuclear fuel particles, were obtained by heating treatment of the gel precursors. The fabricated $CeO_2$ microspheres have a narrow size distribution and good sphericity due to the feature of microfluidics. The effects of heating processes parameters, such as heating mode and peak temperatures on the properties of microspheres were studied in detail. An optimized heating mode and the peak temperature of $650^{\circ}C$ were selected to produce porous $CeO_2$ microspheres. The optimized heating mode can avoid the appearance of broken or crack microspheres in the heating process, and as-prepared porous microspheres were of suitable pore size distribution and pore volume for loading minor actinide (MA) solution by an infiltration method that is used for fabrication of MA-bearing nuclear fuel beads. After the infiltration process, $1000^{\circ}C$ was selected as the final temperature to improve the compressive strength of microspheres.

Rule-based Process Control System for multi-product, small-sized production (다품종 소량생산 공정을 위한 규칙기반 공정관리 시스템)

  • Im, Kwang-Hyuk
    • Journal of Korea Society of Industrial Information Systems
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    • v.15 no.1
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    • pp.47-57
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    • 2010
  • There have been many problems to apply SPC(Statistical Process Control) which is a traditional process control technology to the process of multi-product, small-sized production because a machine in the process manufactures small numbers, but various kinds of products. Therefore, we need the new process control system that can flexibly control the process by setting up the SPEC rules and the KNOWHOW rules. The SPEC rule contains the combination of diverse conditions to specify the characteristics of various products. The KNOWHOW rule is based on engineers' know-how. The study suggests the Rule-base Process Control that can be optimized to the multi-product, small-sized production. It was validated in the process of semiconductor production.

A Procedure for Robust Evolutionary Operations

  • Kim, Yongyun B.;Byun, Jai-Hyun;Lim, Sang-Gyu
    • International Journal of Quality Innovation
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    • v.1 no.1
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    • pp.89-96
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    • 2000
  • Evolutionary operation (EVOP) is a continuous improvement system which explores a region of process operating conditions by deliberately creating some systematic changes to the process variable levels without jeopardizing the product. It is aimed at securing a satisfactory operating condition in full-scale manufacturing processes, which is generally different from that obtained in laboratory or pilot plant experiments. Information on how to improve the process is generated from a simple experimental design. Traditional EVOP procedures are established on the assumption that the variance of the response variable should be small and stable in the region of the process operation. However, it is often the case that process noises have an influence on the stability of the process. This process instability is due to many factors such as raw materials, ambient temperature, and equipment wear. Therefore, process variables should be optimized continuously not only to meet the target value but also to keep the variance of the response variables as low as possible. We propose a scheme to achieve robust process improvement. As a process performance measure, we adopted the mean square error (MSE) of the replicate response values on a specific operating condition, and used the Kruskal-Wallis test to identify significant differences between the process operating conditions.

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The Development of Deep Silicon Etch Process with Conventional Inductively Coupled Plasma (ICP) Etcher (범용성 유도결합 플라즈마 식각장비를 이용한 깊은 실리콘 식각)

  • 조수범;박세근;오범환
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.7
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    • pp.701-707
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    • 2004
  • High aspect ratio silicon structure through deep silicon etching process have become indispensable for advanced MEMS applications. In this paper, we present the results of modified Bosch process to obtain anisotropic silicon structure with conventional Inductively Coupled Plasma (ICP) etcher instead of the expensive Bosch process systems. In modified Bosch process, etching step ($SFsub6$) / sidewall passivation ($Csub4Fsub8$) step time is much longer than commercialized Bosch scheme and process transition time is introduced between process steps to improve gas switching and RF power delivery efficiency. To optimize process parameters, etching ($SFsub6$) / sidewall passivation ($Csub4Fsub8$) time and ion energy effects on etching profile was investigated. Etch profile strongly depends on the period of etch / passivation and ion energy. Furthermore, substrate temperature during etching process was found to be an important parameter determining etching profile. Test structures with different pattern size have been etched for the comparison of the aspect ratio dependent etch rate and the formation of silicon grass. At optimized process condition, micropatterns etched with modified Bosch process showed nearly vertical sidewall and no silicon grass formation with etch rate of 1.2 ${\mu}{\textrm}{m}$/ min and the size of scallop of 250 nm.

Analysis of the Effect of the Etching Process and Ion Injection Process in the Unit Process for the Development of High Voltage Power Semiconductor Devices (고전압 전력반도체 소자 개발을 위한 단위공정에서 식각공정과 이온주입공정의 영향 분석)

  • Gyu Cheol Choi;KyungBeom Kim;Bonghwan Kim;Jong Min Kim;SangMok Chang
    • Clean Technology
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    • v.29 no.4
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    • pp.255-261
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    • 2023
  • Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.

Performance of Solution Processed Zn-Sn-O Thin-film Transistors Depending on Annealing Conditions

  • Han, Sangmin;Lee, Sang Yeol;Choi, Jun Young
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.62-64
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    • 2015
  • We have investigated zinc tin oxide (ZTO) thin films under various silicon ratios. ZTO TFTs were fabricated by solution processing with the bottom gate structure. Furthermore, annealing process was performed at different temperatures in various annealing conditions, such as air, vacuum and wet ambient. Completed fabrication of ZTO TFT, and the performance of TFT has been compared depending on the annealing conditions by measuring the transfer curve. In addition, structure in ZTO thin films has been investigated by X-ray diffraction spectroscopy (XRD) and Scanning electron microscope (SEM). It is confirmed that the electrical performance of ZTO TFTs are improved by adopting optimized annealing conditions. Optimized annealing condition has been found for obtaining high mobility.

Optimized Design of a Tag Antenna for RFID using a Meander Line (미앤더 라인을 이용한 RFID 태그 안테나 최적 설계)

  • Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.12
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    • pp.2293-2298
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    • 2011
  • In this paper, A tag antenna structure for RFID application with resonant frequency of 920MHz is proposed using the meander line technique and Evolution Strategy. Miniaturization structure design for a tag antenna is performed by structure combining the half-wave dipole with a meander line. To achieve this, an interface program between a commercial EM analysis tool and the optimal design program is made for implementing the evolution strategy technique that seeks a global optimum of the objective function through the iterative design process consisting of variation and reproduction. The optimized tag antenna size is 63mm ${\times}$ 15mm ${\times}$ 1mm. And the proposed antenna is realized on FR-4 substrate (${\epsilon}_r=4.4$, $tna{\delta}=0.02$).