• Journal of Digital Convergence
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• v.14 no.11
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• pp.297-304
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• 2016

The aim of the study is to combine software reuse with agile methods through reuse in the early stage of agile development. Although agile methods and software reuse have different practices and principles, these methods have common goals, such as reducing development time and costs and improving productivity. Both approaches are expected to serve as viable solutions to the demand for fast development or embracing requirement changes in the rapidly changing environments. In the present paper, we identify economical agile reuse and its type and study a reuse technique for input queue in Kanban board at the early stage of hybrid agile methods. Based on our results, we can integrate software reuse with agile methods by backlog factoring for input queue item in the hybrid Scrum and Kanban method. The proposed technique can be effectively applied to e-class applications and can reuse the input queue items, showing the combination of the two approaches. With this study, we intend to contribute to reuse in the early stage of agile development. In the future, we plan to develop a software tool for economical agile reuse.

• KIPS Transactions on Software and Data Engineering
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• v.9 no.9
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• pp.291-296
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• 2020

With the recent development of IT technology, various digital media to which new information technology is applied are being developed. In classroom lessons, the learning environment centered on lectures has changed to a learning environment in which learners participate. In particular, Interactive WhiteBoard (IWB) are used as an effective digital medium for teacher-learners to collaborate for interaction. However, existing IWB are expensive to purchase and maintain, and provide various and complicated functions to operate the IWB, which imposes a heavy burden on users. In this paper, we develop a low-cost IWB that supports collaborative learning to facilitate interaction in the space where projectors are installed to improve the teaching-learning environment. In addition, it is implemented so that learning activities using the IWB are interlocked and stored in the learning management system.

• Journal of Satellite, Information and Communications
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• v.8 no.1
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• pp.54-60
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• 2013

The need for high performance of on-board computer (OBC) is essential due to the growing requirements and diversified missions, and so OBC has been developed on the basis of the standard design and reconfigurable modularization in order to improve the utilization of OBC for different missions. The processor in OBC of next generation satellite which is currently developed by KARI is adopted the LEON2-FT/AT697F processor based SPARC v8 as main processor and controls various devices such as SpaceWire, MIL-STD-1553B and CAN through PCI on the standardized communication chips. This paper presents the architecture and design of system software for LEON2-FT processor based on PCI, and development of PCI software component. Also it describes the porting of VxWorks 6.5 for LEON2-FT and the test under the simulation environment for LEON2-FT and PCI with communication chips.

• Journal of Engineering Education Research
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• v.2 no.1
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• pp.10-16
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• 1999

In this paper, we developed the internet-based educational software package (DVLab) for design and virtual experiment of the digital logic circuits. The DVLab consists of the LogicSim module for design and simulation of digital combinational/sequantial logic circuits, micro-controller application circuits and the BreadBoard module for virtual experiment and the Theory module for lecture and the Report/ReportChecker module and some other utility modules. All developed modules can be run as application programs as well as applets in the Internet. The LogicSim and the BreadBoard support real time clock function, output verification function on the designed circuits, trace function of logic values, copy-protection function of designed circuits and provide various devices including logic gates, TTLs, LED, buzzer, and micro-controller. The educational model of digital logic circuit design and experiment using the DVLab is also presented in this paper.

• Journal of The Korean Association of Information Education
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• v.23 no.6
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• pp.621-628
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• 2019

The 2015 revised curriculum offers elementary students an unplugged computing education as a way to learn the concepts and principles of computer science in an easy and fun way and to improve their computational thinking. Yutnori is a traditional board game unique to Korea, which contains various contents such as history, culture, and science of our people, which helps to cultivate cultural identity of learners, and can effectively promote cooperation and communication among members. In this paper, we examined the possibility that Yutnori could be used as an unplugged computing tool in elementary school software education and convergence education. Korean traditional board game Yutnori has elements that can learn the sun and movements of heavenly bodies as well as sequential, selection, and repetitive algorithm elements. Unplugged activities that apply Korean traditional culture Yutnori is expected to help foster creative convergence talents by improving elementary school students' computational thinking, communication and community.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.1
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• pp.46-54
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• 2008

In this paper, a low-cost impedance spectroscopy system(LCISS) suitable for modeling the electrochemical power sources such as fuel cells, batteries and supercapacitors is designed and implemented. Since the developed LCISS is composed of simple sensor circuits, commercial data acquisition board and LabVIEW software, a graphic language with powerful HMI(Human-Machine Interface), it is expected ta be widely used in substitution of the expensive EIS instruments. In the proposed system, the digital lock-in amplifier is adopted to achieve the accurate measurements even in the presence of the high level of noises. The developed hardware and software is applied to measure the impedance spectrum of the Ballard Nexa 1.2kW proton exchange membrane fuel cell stack and an equivalent impedance model is proposed based on the measurement results. The validity of the proposed equivalent circuit and the developed system is proven by the measurement of the ac power losses of the PEM fuel celt stack by the ripple current.

• Korean Journal of Radiology
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• v.19 no.6
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• pp.1053-1065
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• 2018

Objective: To evaluate the clinical impact of using registration software for ablative margin assessment on pre-radiofrequency ablation (RFA) magnetic resonance imaging (MRI) and post-RFA computed tomography (CT) compared with the conventional side-by-side MR-CT visual comparison. Materials and Methods: In this Institutional Review Board-approved prospective study, 68 patients with 88 hepatocellulcar carcinomas (HCCs) who had undergone pre-RFA MRI were enrolled. Informed consent was obtained from all patients. Pre-RFA MRI and post-RFA CT images were analyzed to evaluate the presence of a sufficient safety margin (${\geq}3mm$) in two separate sessions using either side-by-side visual comparison or non-rigid registration software. Patients with an insufficient ablative margin on either one or both methods underwent additional treatment depending on the technical feasibility and patient's condition. Then, ablative margins were re-assessed using both methods. Local tumor progression (LTP) rates were compared between the sufficient and insufficient margin groups in each method. Results: The two methods showed 14.8% (13/88) discordance in estimating sufficient ablative margins. On registration software-assisted inspection, patients with insufficient ablative margins showed a significantly higher 5-year LTP rate than those with sufficient ablative margins (66.7% vs. 27.0%, p = 0.004). However, classification by visual inspection alone did not reveal a significant difference in 5-year LTP between the two groups (28.6% vs. 30.5%, p = 0.79). Conclusion: Registration software provided better ablative margin assessment than did visual inspection in patients with HCCs who had undergone pre-RFA MRI and post-RFA CT for prediction of LTP after RFA and may provide more precise risk stratification of those who are treated with RFA.

• ETRI Journal
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• v.31 no.6
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• pp.732-740
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• 2009

This paper describes the implementation of a digital audio effect system-on-a-chip (SoC), which integrates an embedded digital signal processor (DSP) core, audio codec intellectual property, a number of peripheral blocks, and various audio effect algorithms. The audio effect SoC is developed using a software and hardware co-design method. In the design of the SoC, the embedded DSP and some dedicated hardware blocks are developed as a hardware design, while the audio effect algorithms are realized using a software centric method. Most of the audio effect algorithms are implemented using a C code with primitive functions that run on the embedded DSP, while the equalization effect, which requires a large amount of computation, is implemented using a dedicated hardware block with high flexibility. For the optimized implementation of audio effects, we exploit the primitive functions of the embedded DSP compiler, which is a very efficient way to reduce the code size and computation. The audio effect SoC was fabricated using a 0.18 ${\mu}m$ CMOS process and evaluated successfully on a real-time test board.

• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.4
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• pp.177-187
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• 2020

Virtualization with hypervisors is one of emerging topics in multicore processors for space. Hypervisors are software layers to make several independent virtualized environments on one processor. Since all hardware resources are virtualized and distributed only by hypervisors, overall performance of processors can be improved by fully utilizing the resources. However at the same time, there are overheads for virtualizing and distributing hardware resources. Satellites are one of hard real time systems, and performance degradation with overheads should be analyzed thoroughly. Previous research on the overheads focused on single core systems. Even the overheads were analyzed in multicore systems, SMP environment was not fully included. This paper builds SMP environment with XtratuM, one of hypervisors for space missions, and analyzes performance degradation with overheads. Two boards of GR712RC with 2 LEON3FT CPUs and GR740 with 4 LEON4 CPUs are used in experiments. On each board, SMP benchmark functions are executed on SMP environment with XtratuM and on that without XtratuM respectively. Results are analyzed to find timing characteristics including overheads. Finally, applicability of the XtratuM to flight software in SMP is also reviewed.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.44 no.2
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• pp.172-180
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• 2016

A cubesat classified as a pico-satellite typically uses commercial-grade components that satisfy the vibration and thermal environmental specifications and goes into mission orbit even after undergoing minimum environment tests due to their lower cost and short development period. However, its reliability exposed to the physical environment such as on-orbit thermal vacuum for long periods cannot be assured under minimum tests criterion. In this paper, we have analysed the reliability and life prediction of the failure mechanisms of the cubesat mission board during its service life under the launch and on-orbit environment by using the sherlock software which has been widely used in automobile fields to predict the reliability of electronic devices.