• Journal of IKEEE
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• v.20 no.4
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• pp.428-431
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• 2016

Power semiconductor devices had been producted with bipolar only processes, but Bipolar-CMOS-DMOS(BCD) processes have been adapted recently to fabricate these devices since most foundry companies have provided BCD processes instead of Bipolar only processes. In this study, Regulator and OP Amp are used as most popular design IPs and BCD processes for the designing are converted from bipolar only processes. Power Switching Sensor(PSS) ICs are designed specifically and fabricated on a silicon chip. The operation results of the packaged chip show the good matching with test results of the simulation.

• The Journal of the Acoustical Society of Korea
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• v.16 no.6
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• pp.54-60
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• 1997

In the SC filter consist of SC integrator and SC Lossy Integrator, after this paper proposes the method that cancels phase error using LDI clock and the imaginary part in damping term of SC Lossy integrator, LDI fifth order elliptic low-pass SC filter is designed. With the result of SCANAP program simulation applying the designed CMOS OP-Amp using power supply ${\pm}$5V and MOSIS 2--${\mu}$m double-poly double-metal n-well CMOS design rule.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.288-290
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• 2006

An efficiency improving method for Uninterruptible Power Supply System(UPS) was developed by using OP-AMP based application circuits such as voltage detection device, current detection device and static switch control device. The efficiency improving algorithm was made by mixing the operating concepts of On-Line type UPS with the operating concepts of Off-Line type UPS. The UPS' inverter does not work if the UPS' output load current is not higher than the low load operating current which is about 0-30(%) of the UPS' output load capacity. The low load operating current is adjustable within the half of the UPS' output load capacity. If the UPS' output load current is rising over than the low load operating current, the UPS' inverter starts working and the inverter output power feeds to the loads of UPS. If UPS' input power breaks out while UPS' inverter does not operate because the load current is low, the inverter starts working within 4(ms) with excessive output voltage which is ${\pm}$8(%) of normal UPS' output voltage. Like these. UPS can continuously feeds power to it's load device and reduce power consumptions.

• Journal of Sensor Science and Technology
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• v.3 no.3
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• pp.22-27
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• 1994

Design of potentiostat and I-V converter for micro pO2 sensor is described. Also, The operation of the designed circuit, in connection with the eqivalent model of micro pO2 sensor, is simulated. The potentiostat showed low output resistance of $l.1k{\Omega}$ and input voltage range of $-3{\sim}2.5V$. And the I-V converter showed low input resistance of $30{\Omega}$ and good linearity between input and output.

• ETRI Journal
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• v.31 no.6
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• pp.717-724
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• 2009

This paper describes a 1.2 V 12 b 60 MS/s CMOS analog front-end (AFE) employing low-power and flexible design techniques for image signal processing. An op-amp preset technique and programmable capacitor array scheme are used in a variable gain amplifier to reduce the power consumption with a small area of the AFE. A pipelined analog-to-digital converter with variable resolution and a clock detector provide operation flexibility with regard to resolution and speed. The AFE is fabricated in a 0.13 ${\mu}m$ CMOS process and shows a gain error of 0.68 LSB with 0.0352 dB gain steps and a differential/integral nonlinearity of 0.64/1.58 LSB. The signal-to-noise ratio of the AFE is 59.7 dB at a 60 MHz sampling frequency. The AFE occupies 1.73 $mm^2$ and dissipates 64 mW from a 1.2 V supply. Also, the performance of the proposed AFE is demonstrated by an implementation of an image signal processing platform for digital camcorders.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.181-187
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• 2012

LED is just a semiconductor which can produce light. Currently, there are active research works on LED lighting technologies according to the growth of energy-saving environmental industry. Especially, LED communication is one of the active research works in these fields. In this paper, we design a LED communication-based PC-PC transmission system. A transmission circuit system(transmitter) using LED and a receiving circuit system(receiver) using PD(photo detector) and Op-amp are designed, respectively. The experiments for the designed system are performed as follows. One computer is connected at the end of transmitter and receiver, respectively, and text files are transmitted by using text transmission programming. In this experiment, we test the performance with various baud rates, LED colors, transmission ranges.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.11
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• pp.83-91
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• 1990

VOC(coltage controlled oscillator) circuits are necessary in applications such at the demodul-ation of FM signals, frequency synthesizer, and for clock recovery from digital data. In this paper, we designed the VCO circuit based on a OTA(operational transconductance amplifier) and the OP amp which using a differential amplifier by BiCMOS circuit. It consists of a OTA, voltage contorolled integrator and a schmitt trigger. Conventional VCO circuits are designed using the CMOS circuit, but in this paper we designed newly BiCMOS VCO circuit which has a good drive avlity, As a result of SPICE simulation, output frequency is 141KHz at 105KHz, and sensitivity is 15KHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.3
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• pp.223-228
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• 2010

In this paper, temperature compensation circuit for the X-band voltage controlled oscillator(VCO) is presented by using the temperature sensor with the OP-AMP circuit. The frequency drifting by the temperature could be compensated by applying the tuning voltage which include the linearly changing output voltage of the temperature sensor. As a result, the frequency variation is reduced to 6.6~4.4 MHzfrom the 71~73 MHz variation with the compensation circuit over -30~+$60^{\circ}C$ range, when VCO is operated in the frequency range of 9.95~10.05 GHz.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1131-1138
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• 2015

This study presents an input-powered high-efficiency interface circuit for energy harvesting systems, and introduces a zero standby power design to reduce power consumption significantly while removing the external power supply. This interface circuit is composed of two stages. The first stage voltage doubler uses a positive feedback control loop to improve considerably the conversion speed and efficiency, and boost the output voltage. The second stage active diode adopts a common-grid operational amplifier (op-amp) to remove the influence of offset voltage in the traditional comparator, which eliminates leakage current and broadens bandwidth with low power consumption. The system supplies itself with the harvested energy, which enables it to enter the zero standby mode near the zero crossing points of the input current. Thereafter, high system efficiency and stability are achieved, which saves power consumption. The validity and feasibility of this design is verified by the simulation results based on the 65 nm CMOS process. The minimum input voltage is down to 0.3 V, the maximum voltage efficiency is 99.6% with a DC output current of 75.6 μA, the maximum power efficiency is 98.2% with a DC output current of 40.4 μA, and the maximum output power is 60.48 μW. The power loss of the entire interface circuit is only 18.65 μW, among which, the op-amp consumes only 2.65 μW.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.678-681
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• 2009

A single-pixel photon counter is designed using a folded cascode CMOS operational amplifier which is self-biased. Since there is no need for a voltage bias circuit, the layout area and power consumption of the designed counter are reduced. The signal voltage of the designed charge sensitive amplifier (CSA) with the MagnaChip $0.18{\mu}m$ CMOS process is simulated to be 138mv, near the theoretical voltage of 151mV. And the layout area of the designed counter is $100{\mu}m{\times}100{\mu}m$.