• Title/Summary/Keyword: Nios II embedded system

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An Implementation of Linux Device Drivers of Nios II Embedded Processor System for Image Surveillance System (영상 감시 시스템을 위한 Nios II 임베디드 프로세서 시스템의 Linux 디바이스 드라이버 구현)

  • Kim, Dong-Jin;Jung, Young-Bee;Kim, Tae-Hyo;Park, Young-Seak
    • Journal of the Korean Institute of Intelligent Systems
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    • v.20 no.3
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    • pp.362-367
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    • 2010
  • In this paper, we describe implementation of FPGA-based Nios II embedded processor system and linux device driver for image monitoring system which is supplement weakness for fixed surveillance area of existing CCTV system and by manual operation of the camera's moving. Altera Nios II processor 8.0 is supported MMU which is stable and efficient managed memory. We designed the image monitoring and control system by using Altera Nios II soft-core processor system which is flexible in various application and excellent adaptability. By implementation of camera device driver and VGA decvice driver for Linux-based Nios II system, we implemented image serveillance system for Nios II embedded processor system.

Implementation of an Intelligent Visual Surveillance System Based on Embedded System (임베디드 시스템 기반 지능형 영상 감시 시스템 구현)

  • Song, Jae-Min;Kim, Dong-Jin;Jung, Yong-Bae;Park, Young-Seak;Kim, Tae-Hyo
    • Journal of the Institute of Convergence Signal Processing
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    • v.13 no.2
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    • pp.83-90
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    • 2012
  • In this paper, an intelligent visual surveillance system based on a NIOS II embedded platform is implemented. By this time, embedded based visual surveillance systems were restricted for a special purpose because of high dependence upon hardware. In order to improve the restriction, we implement a flexible embedded platform, which is available for various purpose of applications. For high speed processing of software based programming, we improved performance of the system which is integrated the SOPC type of NIOS II embedded processor and image processing algorithms by using software programming and C2H(The Altera NIOS II C-To-Hardware(C2H) Acceleration Compiler) compiler in the core of the hardware platform. Then, we constructed a server system which globally manage some devices by the NIOS II embedded processor platform, and included the control function on networks to increase efficiency for user. We tested and evaluated our system at the designated region for visual surveillance.

The Implementation of uClinux Device Driver of Nios II Embedded Processor System for Multimedia Application (멀티미디어 응용을 위한 Nios II 임베디드 프로세서 시스템의 uClinux 디바이스 드라이버 구현)

  • Kim, Dong-Jin;Park, Young-Seak
    • Journal of the Institute of Convergence Signal Processing
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    • v.10 no.4
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    • pp.245-255
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    • 2009
  • Recently, embedded processor systems have been widely used in the field of information communication devices and increased its use range and influence. The embedded systems are offered variety of functions, and its operating systems have been developed to make them easy to repair and maintain. Especially embedded linux is very cheap and provide a lot of equipment drivers. Also we can set up our own system because the source code is opened. In this paper, we describe the implementation of Touch panel and TFT-LCD device driver that are widely used for multimedia application. We designed the system hardware by using Altera Nios II embedded system. And we implemented the device drivers of frame buffer, touch panel and i2s based on uClinux for multimedia application, and tested actual operations of the integrated system.

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The Development of Object Tracking System Using C2H and Nios II Embedded Processor (Nios II 임배디드 프로세서 및 C2H를 이용한 무인 자동객체추적 시스템 개발)

  • Jung, Yong-Bae;Kim, Dong-Jin;Park, Young-Seak;Kim, Tea-Hyo
    • Journal of the Korean Institute of Intelligent Systems
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    • v.20 no.4
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    • pp.580-585
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    • 2010
  • In this paper, The object Tracking System is designed by SOPC based Nios II embedded processor and C2H compiler. And this system using single PTZ camera can effectively control IPs in the platform of SOPC based Nios II Embedded Processor and creating IP by C2H(C-To-Hardware) compiler for image-in/output, image-processing and devices of communication that can supply various monitoring information to network or serial. Accordingly, Special quality and processing speed of object tracking using high-quality algorism in the system is improved by hardware/software programming methods.

Implementation of An Unmanned Visual Surveillance System with Embedded Control (임베디드 제어에 의한 무인 영상 감시시스템 구현)

  • Kim, Dong-Jin;Jung, Yong-Bae;Park, Young-Seak;Kim, Tae-Hyo
    • Journal of the Institute of Convergence Signal Processing
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    • v.12 no.1
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    • pp.13-19
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    • 2011
  • In this paper, a visual surveillance system using SOPC based NIOS II embedded processor and C2H compiler was implemented. In this system, the IP is constructed by C2H compiler for the output of the camera images, image processing, serial communication and network communication, then, it is implemented to effectively control each IP based on the SOPC and the NIOS II embedded processor. And, an algorithm which updates the background images for high speed and robust detection of the moving objects is proposed using the Adaptive Gaussian Mixture Model(AGMM). In results, it can detecte the moving objects(pedestrians and vehicles) under day-time and night-time. It is confirmed that the proposed AGMM algorithm has better performance than the Adaptive Threshold Method(ATM) and the Gaussian Mixture Model(GMM) from our experiments.

A Design of Multi-channel Speech Pickup Embedded System for Hands-free Comuunication (핸즈프리 통신을 위한 다중채널 음성픽업 임베디드 시스템 설계)

  • Ju, Hyng-Jun;Park, Chan-Sub;Jeon, Jae-Kuk;Kim, Ki-Man
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.2
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    • pp.366-373
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    • 2007
  • In this paper we propose a multi-channel speech pickup system for calling quality enhancement of hands-free communication using ALTERA Nios-II processor. Multi-channel speech pickup system uses Delay-and-Sum beamformer with zero-padding interpolator. This paper implements speech pickup system using the Nios-II processor with real-time I/O data processing speed. The proposes speech pickup embedded system shows a good agreement with those of computer simulation(MATLAB) and conventional DSP processor(TMS320C6711) result. The proposed method is effective more than previous methods in cost and design processing time. As a result, LE(Logic Element) of hardware used 3,649/5,980(61%) on a chip.

The Design and implementation of parallel processing system using the $Nios^{(R)}$ II embedded processor ($Nios^{(R)}$ II 임베디드 프로세서를 사용한 병렬처리 시스템의 설계 및 구현)

  • Lee, Si-Hyun
    • Journal of the Korea Society of Computer and Information
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    • v.14 no.11
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    • pp.97-103
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    • 2009
  • In this thesis, we discuss the implementation of parallel processing system which is able to get a high degree of efficiency(size, cost, performance and flexibility) by using $Nios^{(R)}$ II(32bit RISC(Reduced Instruction Set Computer) processor) embedded processor in DE2-$70^{(R)}$ reference board. The designed Parallel processing system is master-slave, shared memory and MIMD(Mu1tiple Instruction-Multiple Data stream) architecture with 4-processor. For performance test of system, N-point FFT is used. The result is represented speed-up as follow; in the case of using 2-processor(core), speed-up is shown as average 1.8 times as 1-processor's. When 4-processor, the speed-up is shown as average 2.4 times as it's.

An Implementation of SoC FPGA-based Real-time Object Recognition and Tracking System (SoC FPGA 기반 실시간 객체 인식 및 추적 시스템 구현)

  • Kim, Dong-Jin;Ju, Yeon-Jeong;Park, Young-Seak
    • IEMEK Journal of Embedded Systems and Applications
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    • v.10 no.6
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    • pp.363-372
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    • 2015
  • Recent some SoC FPGA Releases that integrate ARM processor and FPGA fabric show better performance compared to the ASIC SoC used in typical embedded image processing system. In this study, using the above advantages, we implement a SoC FPGA-based Real-Time Object Recognition and Tracking System. In our system, the video input and output, image preprocessing process, and background subtraction processing were implemented in FPGA logics. And the object recognition and tracking processes were implemented in ARM processor-based programs. Our system provides the processing performance of 5.3 fps for the SVGA video input. This is about 79 times faster processing power than software approach based on the Nios II Soft-core processor, and about 4 times faster than approach based the HPS processor. Consequently, if the object recognition and tracking system takes a design structure combined with the FPGA logic and HPS processor-based processes of recent SoC FPGA Releases, then the real-time processing is possible because the processing speed is improved than the system that be handled only by the software approach.

An Implementation of CAN Communication Interface using the Embedded Processor System based on FPGA (FPGA 기반의 임베디드 프로세서 시스템을 이용한 CAN 통신 인터페이스 구현)

  • Koo, Tae-Mook;Park, Young-Seak
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.1
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    • pp.53-62
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    • 2010
  • Recently, various industrial embedded systems including vehicles controlled electronically are evolving to distributed multi-micro controller system. Accordingly, there is a need for standard CAN(Controller Area Network) protocol that ensures high stability and reliability of communication and is simple to construct object-oriented system with high control efficiency. CAN communication interface used general-purpose processor doesn't have many limitations in various application development because of fixed hardware architecture. This paper design and implement a CAN communication interface system based on FPGA. It is verified function and performance of system through monitoring communication with existing AT90CAN128 controller. Implemented CAN communication interface can be reused in development of application systems based on FPGA. And it provides low-cost, small-size and low-power design advantages.

An Implementation of Real-Time SONAR Signal Display System using the FPGA Embedded Processor System (FPGA 임베디드 프로세서 시스템을 사용한 실시간 SONAR 선호 디스플레이 시스템의 구현)

  • Kim, Dong-Jin;Kim, Dae-Woong;Park, Young-Seak
    • Journal of the Institute of Convergence Signal Processing
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    • v.12 no.4
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    • pp.315-321
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    • 2011
  • The CRT monitor display system for SONAR signal that are commonly used in ships or naval vessels uses vector scanning method. Therefore the processing circuits of the system is complex. Also because production had been shut down, the supply of parts is difficult as well as high-cost. FPGA -based embedded processor system is flexible to adapting to various applications because it makes simple processing circuits and its core is easily reconfigurable, and provides high speed performance in low-cost. In this paper, we describe an implementation of SONAR signal LCD display system using the FPGA embedded processor system to overcome some weakness of existing CRT system. By changing X-Y Deflection and CRT control blocks of current system into FPGA embedded processor system, our system provides the simplicity, flexibility and low-cost of system configuration, and also real-time acquisition and display of SONAR signal.