• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.112-113
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• 2013

본 논문에서는 부트스트랩 게이트 드라이브 회로가 적용된 3-레벨 NPC 인버터의 전동기 저속 운전에 적용하기 위한 PWM 스위칭 전략을 제안한다. 3-레벨 NPC 인버터를 이용하여 전동기를 제어할 경우, 일반적으로 구현의 편리성 때문에 CBPWM이 주로 사용된다. CBPWM 중 Unipolar 방법이 주로 사용되지만 부트스트랩 회로를 적용한 3-레벨 NPC 인버터의 전동기 저속 운전 시 부트스트랩 캐패시터 방전에 의한 전압 감소 크기가 증가한다. 캐패시터 전압이 정상적인 인버터 동작을 위한 한계 전압 이하로 감소하면 정상적인 제어는 불가능하다. 따라서 본 논문에서는 부트스트랩 회로가 적용된 3-레벨 NPC 인버터의 전동기 저속 운전에 적용하기 위한 PWM 스위칭 전략에 대해 제안 하였으며 시뮬레이션을 통하여 그 타당성을 증명하였다.

• Journal of Power Electronics
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• v.18 no.2
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• pp.432-444
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• 2018

This paper presents a capacitor voltage balancing topology using a three-level boost converter (TLBC) for a neutral point clamped (NPC) three-level inverter fed surface permanent magnet synchronous motor drive (SPMSM). It enhanced the performance of the drive in terms of its voltage THD and torque pulsation. The main attracting feature of the proposed control is the boosting of the input voltage and at the same time the balancing of the capacitor voltages. This control also reduces the computational complexity. For the purpose of close loop vector control, a software based cost effective resolver to digital converter RDC-less estimation is implemented to calculate the speed and position. The proposed drive is simulated in the MATLAB/SIMULINK environment and an experimental investigation using dSPACE DS1104 validates the proposed drive system at different operating condition.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.630-634
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• 2004

A new three phase three-level Pulse Width Modulation (PWM) Switched Voltage Source (SVS) inverter with zero neutral point potential is proposed. The major advantage is that the peak value of the phase output voltage is twice as high as that of the conventional neutral-point-clamped (NPC) PWM inverter. Furthermore, three-level waveforms of the proposed inverter can be achieved without switch voltage unbalance problem. Since the average neutral point potential of the proposed inverter is zero, the common ground between input stage and output stage is possible. The proposed inverter is verified by experimental results based on a laboratory prototype.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1415-1425
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• 2016

This paper presents a new approach for fault diagnosis in three-level neutral point clamped inverters. The proposed method is based on the average values of the positive and negative parts of normalized output currents. This method is capable of detecting and locating multiple open-circuit faults in the controlled power switches of converters in half of a fundamental period of those currents. The implementation of this diagnostic approach only requires two output currents of the inverter. Therefore, no additional sensors are needed other than the ones already used by the control system of a drive based on this type of converter. Moreover, through the normalization of currents, the diagnosis is independent of the load level of the converter. The performance and effectiveness of the proposed diagnostic technique are validated by experimental results obtained under steady-state and transient conditions.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.7-11
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• 2017

This paper describes a design concept of NPC1 power stack for 1500VDC megawatt level solar inverter. This stack uses three latest half-bridge IGBT modules with highest power density and operation junction temperature, which enable realization of power level beyond 1MW without paralleling. Critical design concept on loop inductance is explained. Dynamic characteristics are verified by double-pulse test. Thermal characteristics and output power limits are verified by thermal test. Temperature-sensitive component on PCB as output power constraint is identified. Different PCB repositioning solutions are tested to give the overall output power thermal derating curves, which enable output power of 1.15MW at $T_A=55^{\circ}C$ with $15^{\circ}C$ thermal margin. The power stack characteristic and performance change under different thermal environment is further analyzed.

• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.213-214
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• 2011

본 논문은 계통연계형 3-레벨 NPC 인버터 시스템의 중성점 전압 불평형 제어기법을 제안한다. 3-레벨 NPC 인버터는 직류단 커패시터를 2개로 나누어 사용하기 때문에 두 커패시터간의 전압차이가 발생할 수 있으며 이는 출력전류의 왜곡을 야기한다. 본 논문에서는 복잡한 모델링을 통한 제어기 설계나 공간 벡터 전압 변조 방법의 변형 없이 간단하게 시간오프셋을 추가하여 N형과 P형의 small 전압 벡터의 인가시간을 조절함으로써 중성점 전압 불평 형을 제어하고, 복잡한 계산 없이 적절한 시간오프셋을 구한다. 10kW급 계통연계 3-레벨 NPC 인버터 모델을 기반으로 수행된 시뮬레이션 결과를 바탕으로 제안하는 제어기법의 타당성을 보인다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.510-511
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• 2012

최근 전력변환 분야에서 고압 인버터의 요구가 증가함에 따라 국내외 Drive 업체에서 멀티레벨 인버터에 대한 관심이 커지고 있다. 특히, 현재 LS산전에서 양산되고 있는 Cascaded H-Bridge(이하 CHB) Type의 멀티레벨 인버터와 더불어 1981년 Nabae 교수에 의해 처음 제안된 3-Level Neutral Point Clamped(이하 NPC) Type의 멀티레벨 인버터는 최근 그 성능 및 신뢰성에 대한 검증이 많이 이루어 졌으며 경쟁사인 ABB/YASKAWA/TMEIC사(社) 등에서 실제 제품화가 되고 있다. 본 논문에서는 현재 LS산전에서 개발중인 3-Level NPC 인버터 기반의 5-Level NPC 인버터의 System 최적화를 위해 양산중인 CHB Type의 멀티레벨 인버터와 그 특성을 비교하여 해당 인버터 개발에 대한 타당성을 검증하였다.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1197-1207
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• 2014

Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1500-1511
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• 2017

The purpose of this paper is to study a high-performance control scheme for neutral-point-clamping three-level (NPC-3L) inverter fed dual three-phase permanent magnet synchronous motor (PMSM) drives by considering some asymmetric factors such as the non-identical parameters in phase windings. To implement this, the system model is analyzed for dual three-phase PMSM drives with asymmetric factors based on the vector space decomposition (VSD) principle. Based on the equivalent circuits, PI controllers with feedforward compensation are used in the d-q subspace for regulating torque, where the cut-off frequency of the PI controllers are set at the twice the fundamental frequency for compensating both the additional DC component and the second order component caused by asymmetry. Meanwhile, proportional resonant (PR) controllers are proposed in the x-y subspace for suppressing the possible unbalanced currents in the phase windings. A dual three-phase space vector modulation (DT-SVM) is designed for the drive, and the balancing factor is designed based on the numerical fitting surface for balancing the DC link capacitor voltages. Experimental results are given to demonstrate the validity of the theoretical analysis and the proposed control scheme.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.3
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• pp.221-227
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• 2022

The reliability improvement of PV systems is an important factor in reducing the cost of PV energy because it is closely related to the annual energy production as well as the maintenance cost of PV systems. The reliability of PV inverters plays a key role in the reliability of PV systems because it is regarded as one of the most reliable critical parts of PV systems. The lifetime evaluation of PV inverters considering the mission profile in the design phase plays an important role in reliability design to ensure the required lifetime of PV inverters. In this paper, the lifetime of representative single-phase T-type and I-type NPC inverters are comparatively evaluated by considering the mission profile of a PV system recorded at Iza, Spain. Furthermore, the effect of the pulse width modulation methods on the lifetime is also discussed. The lifetime evaluation of PV inverters is performed at the component-level first and then the system level by considering all power devices.