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http://dx.doi.org/10.6113/JPE.2018.18.2.432

Capacitor Voltage Boosting and Balancing using a TLBC for Three-Level NPC Inverter Fed RDC-less PMSM Drives  

Halder, Sukanta (Department of Electrical Engineering, Indian Institute of Technology)
Kotturu, Janardhana (Department of Electrical Engineering, Indian Institute of Technology)
Agarwal, Pramod (Department of Electrical Engineering, Indian Institute of Technology)
Srivastava, Satya Prakash (Department of Electrical Engineering, Indian Institute of Technology)
Publication Information
Journal of Power Electronics / v.18, no.2, 2018 , pp. 432-444 More about this Journal
Abstract
This paper presents a capacitor voltage balancing topology using a three-level boost converter (TLBC) for a neutral point clamped (NPC) three-level inverter fed surface permanent magnet synchronous motor drive (SPMSM). It enhanced the performance of the drive in terms of its voltage THD and torque pulsation. The main attracting feature of the proposed control is the boosting of the input voltage and at the same time the balancing of the capacitor voltages. This control also reduces the computational complexity. For the purpose of close loop vector control, a software based cost effective resolver to digital converter RDC-less estimation is implemented to calculate the speed and position. The proposed drive is simulated in the MATLAB/SIMULINK environment and an experimental investigation using dSPACE DS1104 validates the proposed drive system at different operating condition.
Keywords
Capacitor voltage balancing; Multilevel inverter; Permanent magnet synchronous motor; RDC; Three-level boost converter; Vector control;
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Times Cited By KSCI : 4  (Citation Analysis)
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