• Korean Journal of Materials Research
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• v.12 no.6
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• pp.464-469
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• 2002

$SrBi_2Nb_2O_9(SBN)$ thin films were grown on Pt/Ti/Si and p-type Si(100) substrates by rf-magnetron co-sputtering method using two ceramic targets, $SrNb_2O_6\; and \;Bi_2O_3$. The structural and electrical characteristics have been investigated to confirm the possibility of the SBN thin films for the applications to destructive and nondestructive read out ferroelectric random access memory(FRAM). For the optimum growth condition X-ray diffraction patterns showed that SBN films had well crystallized Bi-layered perovskite structure after $700^{\circ}C$ heat-treatment in furnace. From this specimen we got remnant polarization $(2P_r)$ of about 6 uC/$\textrm{cm}^2$ and coercive voltage $(V_c)$ of about 1.5 V at an applied voltage of 5 V. The leakage current density was $7.6{\times}10^{-7}$/A/$\textrm{cm}^2$ at an applied voltage of 5V. And for the NDRO-FRAM application, properties of SBN films on Si substrate has been investigated. From transmission electron microscopy (TEM) analysis, we found the furnace treated sample had a native oxide about 2 times thicker than the RTA treated sample and this thick native oxide layer had a bad effect on C-V characteristics of SBN/Si thin film. After $650^{\circ}C$ RTA process, we got the improved memory window of 1.3 V at an applied voltage of 5 V.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.1-10
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• 2003

Device characteristics of the Metal-Ferroclecric-Semiconductor FET(MFSFET) are simulated in this study. The field-dependent polarization model and the square-law FET model are employed in our simulation. C-V$_{G}$ curves generated from our MFSFET simulation exhibit the accumulation, the depletion and the inversion regions clearly. The capacitance, the subthreshold and the drain current characteristics as a function of gate bias exhibit the memory windows are 1 and 2 V, when the coercive voltages of ferroelectric are 0.5 and 1 V respectively. I$_{D}$-V$_{D}$ curves are composed of the triode and the saturation regions. The difference of saturation drain currents of the MFSFET device at the dual threshold voltages in I$_{D}$-V$_{D}$ curve is 1.5, 2.7, 4.0, and 5.7 ㎃, when the gate biases are 0, 0.1, 0.2 and 0.3V respectively. As the drain current is demonstrated after time delay, PLZT(10/30/70) thin film shows excellent reliability as well as the decrease of saturation current is about 18 % after 10 years. Our simulation model is expected to be very useful in the estimation of the behaviour of MFSFET devices.T devices.

• Journal of the Korean Ceramic Society
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• v.39 no.4
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• pp.377-385
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• 2002

The possibility of $ZrO_2$ thin film as insulator for Metal-Ferroelectric-Insulator-Semiconductor(MFIS) structure was investgated. $SrBi_2Ta_2O_9$ and $SrBi_2Ta_2O_9$(SBT) thin films were deposited on P-type Si(111) wafer by R. F. magnetron sputtering method. The electrical properties of MFIS gate were relatively improved by inserting the $ZrO_2$ buffer layer. The window memory increased from 0.5 to 2.2V in the applied gate voltage range of 3-9V when the thickness of SBT film increased from 160 to 220nm with 20nm thick $ZrO_2$. The maximum value of window memory is 2.2V in Pt/SBT(160nm)/$ZrO_2$(20nm)/Si structure with the optimum thickness of $ZrO_2$. These memory windows are sufficient for practical application of NDRO-FRAM operating at low voltage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.8
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• pp.596-600
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• 1998

A method for the nondestructive read-out of the memory in ferroelectric thin films is demonstrated using the detection second harmonic currents introduced in the ferrolelectric capacitor as a response to an ac signal. The sign and phase of the second harmonic current depends on the polarized state +$P_r or -P_r$, The studied ferroelectric PZT thin film is found to have desirable features for the use as a memory element. This method and material seems as a promising approach for the nonvolatile memory storage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.3
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• pp.200-205
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• 2000

This paper describes the structure modeling and operation characteristics of MFMIS(metal-ferroelectric-metal-insulator-semiconductor) device using the Tsuprem4 which is a semiconductor device tool by Avanti. MFMIS device is being studied for nonvolatile memory application at various semiconductor laboratory but it is difficult to fabricate and analyze MFMIS devices using the semiconductor simulation tool: Tsuprem4, medici and etc. So the new library and new materials parameters for adjusting ferroelectric material and platinum electrodes in the tools are studied. In this paper structural model and operation characteristics of MFMIS devices are measured, which can be easily adopted to analysis of MFMIS device for nonvolatile memory device application.

• Korean Journal of Materials Research
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• v.11 no.4
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• pp.290-293
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• 2001

The SrBi$_2$Nb$_2$O$_{9}$ (SBN) thin films were deposited on p-type(100) Si substrates by rf magnetron sputtering to confirm the Possibility of Pt/SBN/Si structure for the application of nondestructive read out ferroelectric random access memory (NDRO- FRAM). The SBN thin films were deposited by co-sputtering method with Sr$_2$Nb$_2$O$_{7}$ (SNO) and Bi$_2$O$_3$ ceramic targets. The SBN thin films deposited at room temperature were annealed at $700^{\circ}C$ for 1hr in $O_2$ ambient. The structural and electrical properties of SBN with different power ratios of targets were measured by x-ray diffraction(XRD), scanning electron microscopy(SEM), capacitance-voltage(C-V), and current-voltage(I-V). The C-V curves of the SBN films showed hysteresis curves of a clockwise rotation showing ferroelectricity. When the Power ratio of the SNO/Bi$_2$O$_3$ targets was 120 W/100 W, the SBN thin films had excellent electrical properties. The memory window of SBN thin film was 1.8 V-6.3 V at applied voltage of 3 V-9 V and the leakage current density was 1.5 $\times$ 10$^{-7}$ A/$\textrm{cm}^2$ at applied voltage of 5 V The composition of SBN thin films was analysed by electron probe X-ray micro analyzer(EPMA) and the atomic ratio of Sr:Bi:Nb with pawer ratio of 120 W/100 W was 1:3:2.

• Journal of the Korean Vacuum Society
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• v.9 no.4
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• pp.315-320
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• 2000

We have investigated the crystal structure and electrical properties of Pt/SBT/$ZrO_2$/Si (MFIS) and Pt/SBT/Si (MFS) structures for the gate oxide of ferroelectric memory. XRD spectra and SEM showed that the SBT film of SBT/$ZrO_2$/Si structure had larger grain than that of SBT/Si structure. $ZrO_2$ film between SBT film and Si substrate is confirmed as a good candidate for a diffusion barrier by the analysis of AES. The remanent polarization decreased and coercive voltage increased in Pt/SBT/$ZrO_2$/Pt/$SiO_2$/Si structure. This effect may increase memory window of MFIS structure directly related to the coercive voltage. From the capacitance-volt-age characteristics, the memory windows of Pt/SBT (210 nm)/$ZrO_2$ (28 nm)/Si structure were in the range of 1~l.5 V at the applied voltage of 4~6 V. The current densities of Pt/SBT/ZrO$_2$/Si with as -deposited Pt electrode and annealed at $800^{\circ}C$ in $O_2$ambient were $8\times10^{-8} A/\textrm{cm}^2$ and $4\times10^{-8}A/\textrm{cm}^2$ , respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.734-737
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• 2004

The metal-ferroelectric-semiconductor (MFS) structure is widely studied for nondestructive readout (NDRO) memory devices, but conventional MFS structure has a critical problem. It is difficult to obtain ferroelectric films like PZT on Si substrate without interdiffusion of impurities such as Pb, Ti and other elements. In order to solve these problems, the metal-ferroelectric-insulator-semiconductor (MFIS) structure has been proposed with a buffer layer of high dielectric constant such as MgO, $Y_2O_3$, and $CeO_2$. In this study, the etching characteristics (etch rate, selectivity) of MgO thin films were etched using $Cl_2/Ar$ plasma. The maximum etch rate of 85 nm/min for MgO thin films was obtained at $Cl_2$(30%)/Ar(70%) gas mixing ratio. Also, the etch rate was measured by varying the etching parameters such as ICP rf power, dc-bias voltage, and chamber pressure. Plasma diagnostics was performed by Langmuir probe (LP) and optical emission spectroscopy (OES).

• Korean Journal of Materials Research
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• v.12 no.5
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• pp.382-386
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• 2002

We studied growth and characterization of $SrBi_2Ta_2O_9$ (SBT) thin films fabricated by low temperature process under vacuum and/or oxygen ambient. A metal organic decomposition (MOD) method based on a spin-on technique and annealing process using a rapid thermal annealing (RTA) method was used to prepare the SBT films. The crystallinity of a ferroelectric phase of SBT thin films is related to the oxygen partial pressure during RTA process. Under an oxygen partial pressure higher than 30 Torr, the crystallization temperature inducing the ferroelectric SBT phase can be lowered to $650^{\circ}C$. Those films annealed at $650^{\circ}C$ in vacuum and oxygen ambient showed good ferroelectric properties, that is, the memory window of 0.5~0.9 V at applied voltage of 3~7 V and the leakage current density of 1.80{\times}10^{-8}$ A/$\textrm{cm}^2$ at an applied voltage of 5V. In comparison with the SBT thin films prepared at 80$0^{\circ}C$ in $O_2$ ambient by furnace annealing process, the SBT thin films prepared at $650^{\circ}C$ in vacuum and oxygen ambient using the RTA process showed a good crystallization and electrical properties which would be able to apply to the virtul device fabrication precess.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.6
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• pp.436-441
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• 1998

$Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ structure was prepared by rf-magnetron sputtering method for use in nondestructive read out ferroelectric RAM(NDRO-FEAM). PBx(Zr_{0.52}Ti_{0.48})O_3}$(PZT) and $SrTiO_3$(STO) films were deposited respectively at the temperatures of $300^{\circ}C and 500^{\circ}C$on p-Si(100) substrate. The role of the STO film as a buffer layer between the PZT film and the Si substrate was studied using X-ray diffraction (XRD), Auger electron spectroscopy (ASE), and scanning electron microscope(SEM). Structural analysis on the interfaces was carried out using a cross sectional transmission electron microscope(TEM). For PZT/Si structure, mostly Pb deficient pyrochlore phase was formed due to the serious diffusion of Pb into the Si substrate. On the other hand, for STO/PZT/STO/Si structure, the PZT film had perovskite phase and larger grain size with a little Pb interdiffusion. the interfaces of the PZT and the STO film, of the STO film and the interface layer and $SiO_2$, and of the $SiO_2$ and the Si substate had a good flatness. Across sectional TEM image showed the existence of an amorphous layer and $SiO_2$ with 7nm thickness between the STO film and the Si substrate. The electrical properties of MIFIS structure was characterized by C-V and I-V measurements. By 1MHz C-V characteristics Pt/STO(25nm)/PZT(160nm)/STO(25nm)/Si structure, memory window was about 1.2 V for and applied voltage of 5 V. Memory window increased by increasing the applied voltage and maximum voltage of memory window was 2 V for V applied. Memory window decreased by decreasing PZT film thickness to 110nm. Typical leakage current was abour $10{-8}$ A/cm for an applied voltage of 5 V.